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97 lines
4.5 KiB
Plaintext
97 lines
4.5 KiB
Plaintext
/* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* * Neither the name of NVIDIA CORPORATION nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS ``AS IS'' AND ANY
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* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
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* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
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* OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <cooperative_groups.h>
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namespace cg = cooperative_groups;
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///////////////////////////////////////////////////////////////////////////////
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// On G80-class hardware 24-bit multiplication takes 4 clocks per warp
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// (the same as for floating point multiplication and addition),
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// whereas full 32-bit multiplication takes 16 clocks per warp.
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// So if integer multiplication operands are guaranteed to fit into 24 bits
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// (always lie within [-8M, 8M - 1] range in signed case),
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// explicit 24-bit multiplication is preferred for performance.
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///////////////////////////////////////////////////////////////////////////////
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#define IMUL(a, b) __mul24(a, b)
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///////////////////////////////////////////////////////////////////////////////
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// Calculate scalar products of VectorN vectors of ElementN elements on GPU
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// Parameters restrictions:
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// 1) ElementN is strongly preferred to be a multiple of warp size to
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// meet alignment constraints of memory coalescing.
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// 2) ACCUM_N must be a power of two.
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///////////////////////////////////////////////////////////////////////////////
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#define ACCUM_N 1024
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__global__ void scalarProdGPU(float *d_C, float *d_A, float *d_B, int vectorN,
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int elementN) {
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// Handle to thread block group
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cg::thread_block cta = cg::this_thread_block();
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// Accumulators cache
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__shared__ float accumResult[ACCUM_N];
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////////////////////////////////////////////////////////////////////////////
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// Cycle through every pair of vectors,
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// taking into account that vector counts can be different
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// from total number of thread blocks
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////////////////////////////////////////////////////////////////////////////
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for (int vec = blockIdx.x; vec < vectorN; vec += gridDim.x) {
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int vectorBase = IMUL(elementN, vec);
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int vectorEnd = vectorBase + elementN;
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////////////////////////////////////////////////////////////////////////
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// Each accumulator cycles through vectors with
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// stride equal to number of total number of accumulators ACCUM_N
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// At this stage ACCUM_N is only preferred be a multiple of warp size
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// to meet memory coalescing alignment constraints.
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////////////////////////////////////////////////////////////////////////
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for (int iAccum = threadIdx.x; iAccum < ACCUM_N; iAccum += blockDim.x) {
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float sum = 0;
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for (int pos = vectorBase + iAccum; pos < vectorEnd; pos += ACCUM_N)
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sum += d_A[pos] * d_B[pos];
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accumResult[iAccum] = sum;
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}
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////////////////////////////////////////////////////////////////////////
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// Perform tree-like reduction of accumulators' results.
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// ACCUM_N has to be power of two at this stage
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////////////////////////////////////////////////////////////////////////
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for (int stride = ACCUM_N / 2; stride > 0; stride >>= 1) {
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cg::sync(cta);
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for (int iAccum = threadIdx.x; iAccum < stride; iAccum += blockDim.x)
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accumResult[iAccum] += accumResult[stride + iAccum];
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}
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cg::sync(cta);
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if (threadIdx.x == 0) d_C[vec] = accumResult[0];
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}
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}
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