mirror of
https://github.com/NVIDIA/cuda-samples.git
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264 lines
8.7 KiB
Plaintext
264 lines
8.7 KiB
Plaintext
/* Copyright (c) 2020, NVIDIA CORPORATION. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* * Neither the name of NVIDIA CORPORATION nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS ``AS IS'' AND ANY
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* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
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* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
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* OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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// Includes, system
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#include <stdio.h>
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// Includes CUDA
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#include <cuda_runtime.h>
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#include <cuda_awbarrier.h>
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#include <cooperative_groups.h>
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// Utilities and timing functions
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#include <helper_functions.h> // includes cuda.h and cuda_runtime_api.h
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// CUDA helper functions
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#include <helper_cuda.h> // helper functions for CUDA error check
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namespace nvcuda_namespace = nvcuda::experimental;
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namespace cg = cooperative_groups;
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#if __CUDA_ARCH__ >= 700
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template <bool writeSquareRoot> __device__ void reduceBlockData(nvcuda_namespace::awbarrier &barrier,
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cg::thread_block_tile<32> &tile32, double &threadSum, double *result)
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{
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extern __shared__ double tmp[];
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#pragma unroll
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for (int offset = tile32.size()/2; offset > 0; offset /= 2)
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{
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threadSum += tile32.shfl_down(threadSum, offset);
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}
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if (tile32.thread_rank() == 0)
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{
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tmp[tile32.meta_group_rank()] = threadSum;
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}
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const auto token = barrier.arrive();
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// The warp which would arrive last at the barrier will
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// perform last round of reduction
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if (tile32.any(token.pending_count() == 1)) {
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double beta = tile32.thread_rank() < tile32.meta_group_size() ? tmp[tile32.thread_rank()] : 0.0;
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#pragma unroll
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for (int offset = tile32.size()/2; offset > 0; offset /= 2)
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{
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beta += tile32.shfl_down(beta, offset);
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}
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if (tile32.thread_rank() == 0)
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{
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if (writeSquareRoot)
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*result = sqrt(beta);
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else
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*result = beta;
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}
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}
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barrier.wait(token);
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}
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#endif
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__global__ void normVecByDotProductAWBarrier(float *vecA, float *vecB, double *partialResults, int size)
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{
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#if __CUDA_ARCH__ >= 700
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cg::thread_block cta = cg::this_thread_block();
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cg::grid_group grid = cg::this_grid();;
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cg::thread_block_tile<32> tile32 = cg::tiled_partition<32>(cta);
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__shared__ nvcuda_namespace::awbarrier barrier;
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if (threadIdx.x == 0) {
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nvcuda_namespace::init(&barrier, blockDim.x);
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}
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cg::sync(cta);
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double threadSum = 0.0;
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for (int i = grid.thread_rank(); i < size; i += grid.size())
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{
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threadSum += (double) (vecA[i] * vecB[i]);
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}
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// Each thread block performs reduction of partial dotProducts and writes to
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// global mem.
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reduceBlockData<false>(barrier, tile32, threadSum, &partialResults[blockIdx.x]);
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cg::sync(grid);
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// One block performs the final summation of partial dot products
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// of all the thread blocks and writes the sqrt of final dot product.
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if (blockIdx.x == 0)
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{
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threadSum = 0.0;
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for (int i = cta.thread_rank(); i < gridDim.x; i += cta.size())
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{
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threadSum += partialResults[i];
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}
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reduceBlockData<true>(barrier, tile32, threadSum, &partialResults[0]);
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}
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cg::sync(grid);
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const double finalValue = partialResults[0];
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// Perform normalization of vecA & vecB.
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for (int i = grid.thread_rank(); i < size; i += grid.size())
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{
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vecA[i] = (float)vecA[i] / finalValue;
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vecB[i] = (float)vecB[i] / finalValue;
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}
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#endif
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}
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int runNormVecByDotProductAWBarrier(int argc, char **argv, int deviceId);
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////////////////////////////////////////////////////////////////////////////////
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// Program main
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////////////////////////////////////////////////////////////////////////////////
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int main(int argc, char **argv)
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{
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printf("%s starting...\n", argv[0]);
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// This will pick the best possible CUDA capable device
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int dev = findCudaDevice(argc, (const char **)argv);
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int major = 0;
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checkCudaErrors(cudaDeviceGetAttribute(&major, cudaDevAttrComputeCapabilityMajor, dev));
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// Arrive-Wait Barrier require a GPU of Volta (SM7X) architecture or higher.
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if (major < 7) {
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printf("simpleAWBarrier requires SM 7.0 or higher. Exiting...\n");
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exit(EXIT_WAIVED);
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}
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int supportsCooperativeLaunch = 0;
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checkCudaErrors(cudaDeviceGetAttribute(&supportsCooperativeLaunch, cudaDevAttrCooperativeLaunch, dev));
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if (!supportsCooperativeLaunch)
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{
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printf("\nSelected GPU (%d) does not support Cooperative Kernel Launch, Waiving the run\n", dev);
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exit(EXIT_WAIVED);
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}
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int testResult = runNormVecByDotProductAWBarrier(argc, argv, dev);
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printf("%s completed, returned %s\n", argv[0], testResult ? "OK" : "ERROR!");
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exit(testResult ? EXIT_SUCCESS : EXIT_FAILURE);
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}
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int runNormVecByDotProductAWBarrier(int argc, char **argv, int deviceId)
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{
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float *vecA, *d_vecA;
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float *vecB, *d_vecB;
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double *d_partialResults;
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int size = 10000000;
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vecA = new float[size];
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vecB = new float[size];
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checkCudaErrors(cudaMalloc(&d_vecA, sizeof(float)*size));
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checkCudaErrors(cudaMalloc(&d_vecB, sizeof(float)*size));
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float baseVal = 2.0;
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for (int i = 0; i < size; i++)
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{
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vecA[i] = vecB[i] = baseVal;
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}
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cudaStream_t stream;
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checkCudaErrors(cudaStreamCreateWithFlags(&stream, cudaStreamNonBlocking));
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checkCudaErrors(cudaMemcpyAsync(d_vecA, vecA, sizeof(float)*size, cudaMemcpyHostToDevice, stream));
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checkCudaErrors(cudaMemcpyAsync(d_vecB, vecB, sizeof(float)*size, cudaMemcpyHostToDevice, stream));
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// Kernel configuration, where a one-dimensional
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// grid and one-dimensional blocks are configured.
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int minGridSize = 0, blockSize = 0;
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checkCudaErrors(cudaOccupancyMaxPotentialBlockSize(
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&minGridSize,
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&blockSize,
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(void*)normVecByDotProductAWBarrier,
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0,
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size));
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int smemSize = ((blockSize/32)+1) * sizeof(double);
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int numBlocksPerSm = 0;
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checkCudaErrors(cudaOccupancyMaxActiveBlocksPerMultiprocessor(&numBlocksPerSm, normVecByDotProductAWBarrier, blockSize, smemSize));
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int multiProcessorCount = 0;
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checkCudaErrors(cudaDeviceGetAttribute(&multiProcessorCount, cudaDevAttrMultiProcessorCount, deviceId));
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minGridSize = multiProcessorCount * numBlocksPerSm;
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checkCudaErrors(cudaMalloc(&d_partialResults, minGridSize*sizeof(double)));
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printf("Launching normVecByDotProductAWBarrier kernel with numBlocks = %d blockSize = %d\n", minGridSize, blockSize);
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dim3 dimGrid(minGridSize, 1, 1), dimBlock(blockSize, 1, 1);
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void *kernelArgs[] = {
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(void*)&d_vecA,
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(void*)&d_vecB,
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(void*)&d_partialResults,
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(void*)&size
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};
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checkCudaErrors(cudaLaunchCooperativeKernel((void *)normVecByDotProductAWBarrier, dimGrid, dimBlock, kernelArgs, smemSize, stream));
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checkCudaErrors(cudaMemcpyAsync(vecA, d_vecA, sizeof(float)*size, cudaMemcpyDeviceToHost, stream));
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checkCudaErrors(cudaStreamSynchronize(stream));
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float expectedResult = (baseVal / sqrt(size*baseVal*baseVal));
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unsigned int matches = 0;
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for (int i=0; i < size; i++)
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{
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if ((vecA[i] - expectedResult) > 0.00001)
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{
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printf("mismatch at i = %d\n", i);
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break;
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}
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else
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{
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matches++;
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}
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}
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checkCudaErrors(cudaFree(d_vecA));
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checkCudaErrors(cudaFree(d_vecB));
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checkCudaErrors(cudaFree(d_partialResults));
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delete[] vecA;
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delete[] vecB;
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return matches == size;
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}
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