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CUDA 13.4 samples update - v13.4-public

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Release 13.4 of the CUDA Samples supported by CUDA Toolkit 13.4.
See Changelog for more information.
This commit is contained in:
Dheemanth
2026-09-09 15:07:08 -07:00
committed by GitHub
parent b7c5481c55
commit 5443602d89
871 changed files with 6843 additions and 321849 deletions
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18
cpp/0_Introduction/simpleStreams/.vscode/c_cpp_properties.json vendored
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@@ -1,18 +0,0 @@
{
"configurations": [
{
"name": "Linux",
"includePath": [
"${workspaceFolder}/**",
"${workspaceFolder}/../../../Common"
],
"defines": [],
"compilerPath": "/usr/local/cuda/bin/nvcc",
"cStandard": "gnu17",
"cppStandard": "gnu++14",
"intelliSenseMode": "linux-gcc-x64",
"configurationProvider": "ms-vscode.makefile-tools"
}
],
"version": 4
}

7
cpp/0_Introduction/simpleStreams/.vscode/extensions.json vendored
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@@ -1,7 +0,0 @@
{
"recommendations": [
"nvidia.nsight-vscode-edition",
"ms-vscode.cpptools",
"ms-vscode.makefile-tools"
]
}

27
cpp/0_Introduction/simpleStreams/CMakeLists.txt
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@@ -1,34 +1,25 @@
cmake_minimum_required(VERSION 3.20)
list(APPEND CMAKE_MODULE_PATH "${CMAKE_CURRENT_SOURCE_DIR}/../../../cmake/Modules")
include("${CMAKE_CURRENT_SOURCE_DIR}/../../../cmake/DetectCudaArch.cmake")
if(SAMPLE_SKIP_BUILD)
return()
endif()
project(simpleStreams LANGUAGES C CXX CUDA)
include("${CMAKE_CURRENT_SOURCE_DIR}/../../../cmake/CudaSampleCommon.cmake")
find_package(CUDAToolkit REQUIRED)
set(CMAKE_POSITION_INDEPENDENT_CODE ON)
set(CMAKE_CUDA_ARCHITECTURES 75 80 86 87 89 90 100 110 120)
set(CMAKE_CUDA_FLAGS "${CMAKE_CUDA_FLAGS} -Wno-deprecated-gpu-targets")
if(ENABLE_CUDA_DEBUG)
set(CMAKE_CUDA_FLAGS "${CMAKE_CUDA_FLAGS} -G") # enable cuda-gdb (may significantly affect performance on some targets)
else()
set(CMAKE_CUDA_FLAGS "${CMAKE_CUDA_FLAGS} -lineinfo") # add line information to all builds for debug tools (exclusive to -G option)
endif()
# Include directories and libraries
include_directories(../../../Common)
# Source file
# Add target for simpleStreams
add_executable(simpleStreams simpleStreams.cu)
target_compile_options(simpleStreams PRIVATE $<$<COMPILE_LANGUAGE:CUDA>:--extended-lambda>)
target_compile_features(simpleStreams PRIVATE cxx_std_17 cuda_std_17)
set_target_properties(simpleStreams PROPERTIES CUDA_SEPARABLE_COMPILATION ON)
# Include installation configuration
include(${CMAKE_CURRENT_SOURCE_DIR}/../../../cmake/InstallSamples.cmake)
include(InstallSamples)
setup_samples_install()

123
cpp/0_Introduction/simpleStreams/README.md
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@@ -1,32 +1,125 @@
# simpleStreams - simpleStreams
# Sample: simpleStreams
## Description
This sample uses CUDA streams to overlap kernel executions with memory copies between the host and a GPU device. This sample uses a new CUDA 4.0 feature that supports pinning of generic host memory. Requires Compute Capability 2.0 or higher.
A simple benchmark that shows how CUDA streams hide memory-transfer latency behind kernel execution.
The GPU computes an element-wise square of a 64 MB float array. It is run twice — once in a single
stream and once split across 4 streams — so you can directly compare the speedup from overlapping
H2D copies, kernel execution, and D2H copies.
## What You'll Learn
- How CUDA streams create independent, in-order queues that enable H2D + kernel + D2H overlap
- How to split a large buffer across N streams so each stream owns its own chunk
- Why pinned (`cudaMallocHost`) host memory is required for `cudaMemcpyAsync` to be truly async
- How to create and use CUDA events to time GPU work with ~0.5 µs precision
- How to query GPU properties (compute capability, SM count) with `cudaDeviceGetAttribute`
## Key Concepts
Asynchronous Data Transfers, CUDA Streams and Events
### CUDA Streams
## Supported SM Architectures
A stream is an ordered queue of GPU commands. Commands in the **same** stream execute in order;
commands in **different** streams may overlap if the hardware has capacity. This sample uses 4
streams. Each stream owns one quarter of the array and runs its own H2D → kernel → D2H pipeline:
[SM 5.0 ](https://developer.nvidia.com/cuda-gpus) [SM 5.2 ](https://developer.nvidia.com/cuda-gpus) [SM 5.3 ](https://developer.nvidia.com/cuda-gpus) [SM 6.0 ](https://developer.nvidia.com/cuda-gpus) [SM 6.1 ](https://developer.nvidia.com/cuda-gpus) [SM 7.0 ](https://developer.nvidia.com/cuda-gpus) [SM 7.2 ](https://developer.nvidia.com/cuda-gpus) [SM 7.5 ](https://developer.nvidia.com/cuda-gpus) [SM 8.0 ](https://developer.nvidia.com/cuda-gpus) [SM 8.6 ](https://developer.nvidia.com/cuda-gpus) [SM 8.7 ](https://developer.nvidia.com/cuda-gpus) [SM 8.9 ](https://developer.nvidia.com/cuda-gpus) [SM 9.0 ](https://developer.nvidia.com/cuda-gpus)
```
Stream 0: [H2D chunk 0][kernel 0][D2H chunk 0]
Stream 1: [H2D chunk 1][kernel 1][D2H chunk 1]
Stream 2: [H2D chunk 2][kernel 2][D2H chunk 2]
Stream 3: [H2D chunk 3][kernel 3][D2H chunk 3]
|----------------------------------------------> wall clock
```
## Supported OSes
D2H copy N waits for kernel N (same stream), but overlaps with the H2D copy and kernel of stream N+1.
Linux, Windows
### The Kernel: `square_kernel`
## Supported CPU Architecture
```cu
out[idx] = in[idx] * in[idx];
```
x86_64, armv7l
Each thread computes the square of one float element. Simple and fast — the bottleneck is the
memory transfer, which streams are designed to hide.
## CUDA APIs involved
### Pinned Host Memory
### [CUDA Runtime API](http://docs.nvidia.com/cuda/cuda-runtime-api/index.html)
cudaMemcpy, cudaSetDeviceFlags, cudaSetDevice, cudaEventDestroy, cudaStreamCreate, cudaMallocHost, cudaEventCreateWithFlags, cudaFreeHost, cudaMemcpyAsync, cudaGetDeviceCount, cudaStreamDestroy, cudaMemset, cudaEventElapsedTime, cudaHostAlloc, cudaFree, cudaHostRegister, cudaEventSynchronize, cudaEventRecord, cudaMalloc, cudaGetDeviceProperties, cudaHostUnregister
`cudaMemcpyAsync` requires pinned (page-locked) host memory so the OS cannot swap out the pages
during the transfer. This sample always uses `cudaMallocHost` — the simplest and most portable
pinning strategy.
## Prerequisites
### Single-stream vs Multi-stream
Download and install the [CUDA Toolkit](https://developer.nvidia.com/cuda-downloads) for your corresponding platform.
| Mode | What happens |
|---|---|
| Single stream | H2D → kernel → D2H run sequentially for the full 64 MB array |
| Multi-stream | 4 chunks pipeline concurrently; copy cost approaches 1/4 of the single-stream baseline |
## References (for more details)
## Key APIs
### CUDA Runtime
- `cudaStreamCreate` / `cudaStreamDestroy` — create and destroy an independent command queue
- `cudaMemcpyAsync` — non-blocking H2D or D2H transfer; requires pinned host memory
- `cudaMemcpy` — blocking transfer used in the single-stream reference benchmark
- `cudaDeviceSynchronize` — wait for all streams to finish before recording the stop event
- `cudaEventCreate` / `cudaEventDestroy` — create and release timing events
- `cudaEventRecord` — insert a timestamp into a stream
- `cudaEventSynchronize` — block the host until the event is recorded
- `cudaEventElapsedTime` — compute milliseconds between two recorded events
- `cudaMallocHost` / `cudaFreeHost` — allocate and free pinned host memory
- `cudaMalloc` / `cudaFree` — standard device memory management
- `cudaDeviceGetAttribute` — query GPU properties such as compute capability and SM count
## Requirements
### Hardware
- NVIDIA GPU with Compute Capability 7.5 or higher
### Software
- CUDA Toolkit (any version supporting the target GPU)
- CMake 3.20 or newer
- A C++17-capable host compiler
## How to Build
See the [top-level README](../../../README.md#building-cuda-samples) for full build instructions, including how to build all samples or a single sample standalone.
## How to Run
```bash
./simpleStreams
```
No arguments needed.
## Expected Output
```text
[ CUDA Sample: Streams ]
GPU Device 0: with compute capability X.Y and Number of SMs <smCount>
Single stream = 8.243 ms
Multi-stream = 3.167 ms
Speedup = 2.60x
```
**Reading the numbers:**
- `Single stream` — full 64 MB processed sequentially (H2D + kernel + D2H back-to-back)
- `Multi-stream` — same work split across 4 streams with overlap; typically 2–3x faster
- `Speedup` — ratio of single-stream time to multi-stream time; higher means more overlap achieved
## Files
- `simpleStreams.cu` — kernel, `run_single_stream`, `run_multi_stream`, and main driver
- `README.md` — this file
- `CMakeLists.txt` — build configuration
## See Also
- [CUDA C++ Programming Guide — CUDA Streams](https://docs.nvidia.com/cuda/cuda-programming-guide/02-basics/asynchronous-execution.html#cuda-streams)
- [CUDA C++ Programming Guide — Creating and Destroying CUDA Streams](https://docs.nvidia.com/cuda/cuda-programming-guide/02-basics/asynchronous-execution.html#creating-and-destroying-cuda-streams)
- [CUDA C++ Best Practices Guide — CUDA Events](https://docs.nvidia.com/cuda/cuda-programming-guide/02-basics/asynchronous-execution.html#cuda-events)

510
cpp/0_Introduction/simpleStreams/simpleStreams.cu
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@@ -1,4 +1,4 @@
/* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved.
/* Copyright (c) 2026, NVIDIA CORPORATION. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -27,396 +27,200 @@
/*
* This sample illustrates the usage of CUDA streams for overlapping
* kernel execution with device/host memcopies. The kernel is used to
* initialize an array to a specific value, after which the array is
* copied to the host (CPU) memory. To increase performance, multiple
* kernel execution with device/host memcopies. The kernel computes an
* element-wise square of a float array, after which the result is copied
* back to host (CPU) memory. To increase performance, multiple
* kernel/memcopy pairs are launched asynchronously, each pair in its
* own stream. Devices with Compute Capability 1.1 can overlap a kernel
* and a memcopy as long as they are issued in different streams. Kernels
* are serialized. Thus, if n pairs are launched, streamed approach
* can reduce the memcopy cost to the (1/n)th of a single copy of the entire
* data set.
* own stream. A GPU can overlap a kernel and a memcopy as long as they
* are issued in different streams. Thus, if n pairs are launched, the
* streamed approach can reduce the memcopy cost to the (1/n)th of a
* single copy of the entire data set.
*
* Additionally, this sample uses CUDA events to measure elapsed time for
* CUDA calls. Events are a part of CUDA API and provide a system independent
* way to measure execution times on CUDA devices with approximately 0.5
* microsecond precision.
*
* Elapsed times are averaged over nreps repetitions (10 by default).
*
*/
const char *sSDKsample = "simpleStreams";
const char *sEventSyncMethod[] = {"cudaEventDefault", "cudaEventBlockingSync", "cudaEventDisableTiming", NULL};
const char *sDeviceSyncMethod[] = {"cudaDeviceScheduleAuto",
"cudaDeviceScheduleSpin",
"cudaDeviceScheduleYield",
"INVALID",
"cudaDeviceScheduleBlockingSync",
NULL};
// System includes
#include <assert.h>
#include <stdio.h>
// CUDA runtime
#include <cuda_runtime.h>
// helper functions and utilities to work with CUDA
#include <helper_cuda.h>
#include <helper_functions.h>
#define N (1 << 24) // ~16M elements
#define BLOCK 256 // threads per block
#define NUM_STREAMS 4 // number of concurrent streams
#ifndef WIN32
#include <sys/mman.h> // for mmap() / munmap()
#endif
// Macro to aligned up to the memory size in question
#define MEMORY_ALIGNMENT 4096
#define ALIGN_UP(x, size) (((size_t)x + (size - 1)) & (~(size - 1)))
__global__ void init_array(int *g_data, int *factor, int num_iterations)
{
// Kernel: computes element-wise square of the input array
__global__ void square_kernel(const float* in, float* out, int n){
int idx = blockIdx.x * blockDim.x + threadIdx.x;
for (int i = 0; i < num_iterations; i++) {
g_data[idx] += *factor; // non-coalesced on purpose, to burn time
if (idx < n){
out[idx] = in[idx] * in[idx];
}
}
bool correct_data(int *a, const int n, const int c)
{
for (int i = 0; i < n; i++) {
if (a[i] != c) {
printf("%d: %d %d\n", i, a[i], c);
return false;
}
}
return true;
}
inline void AllocateHostMemory(bool bPinGenericMemory, int **pp_a, int **ppAligned_a, int nbytes)
{
#if CUDART_VERSION >= 4000
#if !defined(__arm__) && !defined(__aarch64__)
if (bPinGenericMemory) {
// allocate a generic page-aligned chunk of system memory
#ifdef WIN32
printf("> VirtualAlloc() allocating %4.2f Mbytes of (generic page-aligned "
"system memory)\n",
(float)nbytes / 1048576.0f);
*pp_a = (int *)VirtualAlloc(NULL, (nbytes + MEMORY_ALIGNMENT), MEM_RESERVE | MEM_COMMIT, PAGE_READWRITE);
#else
printf("> mmap() allocating %4.2f Mbytes (generic page-aligned system "
"memory)\n",
(float)nbytes / 1048576.0f);
*pp_a = (int *)mmap(NULL, (nbytes + MEMORY_ALIGNMENT), PROT_READ | PROT_WRITE, MAP_PRIVATE | MAP_ANON, -1, 0);
#endif
*ppAligned_a = (int *)ALIGN_UP(*pp_a, MEMORY_ALIGNMENT);
printf("> cudaHostRegister() registering %4.2f Mbytes of generic allocated "
"system memory\n",
(float)nbytes / 1048576.0f);
// pin allocate memory
checkCudaErrors(cudaHostRegister(*ppAligned_a, nbytes, cudaHostRegisterMapped));
}
else
#endif
#endif
{
printf("> cudaMallocHost() allocating %4.2f Mbytes of system memory\n", (float)nbytes / 1048576.0f);
// allocate host memory (pinned is required for achieve asynchronicity)
checkCudaErrors(cudaMallocHost((void **)pp_a, nbytes));
*ppAligned_a = *pp_a;
}
}
inline void FreeHostMemory(bool bPinGenericMemory, int **pp_a, int **ppAligned_a, int nbytes)
{
#if CUDART_VERSION >= 4000
#if !defined(__arm__) && !defined(__aarch64__)
// CUDA 4.0 support pinning of generic host memory
if (bPinGenericMemory) {
// unpin and delete host memory
checkCudaErrors(cudaHostUnregister(*ppAligned_a));
#ifdef WIN32
VirtualFree(*pp_a, 0, MEM_RELEASE);
#else
munmap(*pp_a, nbytes);
#endif
}
else
#endif
#endif
{
cudaFreeHost(*pp_a);
}
}
static const char *sSyncMethod[] = {"0 (Automatic Blocking)",
"1 (Spin Blocking)",
"2 (Yield Blocking)",
"3 (Undefined Blocking Method)",
"4 (Blocking Sync Event) = low CPU utilization",
NULL};
void printHelp()
{
printf("Usage: %s [options below]\n", sSDKsample);
printf("\t--sync_method=n for CPU/GPU synchronization\n");
printf("\t n=%s\n", sSyncMethod[0]);
printf("\t n=%s\n", sSyncMethod[1]);
printf("\t n=%s\n", sSyncMethod[2]);
printf("\t <Default> n=%s\n", sSyncMethod[4]);
printf("\t--use_generic_memory (default) use generic page-aligned for system "
"memory\n");
printf("\t--use_cuda_malloc_host (optional) use cudaMallocHost to allocate "
"system memory\n");
}
#if defined(__APPLE__) || defined(MACOSX)
#define DEFAULT_PINNED_GENERIC_MEMORY false
#else
#define DEFAULT_PINNED_GENERIC_MEMORY true
#endif
int main(int argc, char **argv)
{
int cuda_device = 0;
int nstreams = 4; // number of streams for CUDA calls
int nreps = 10; // number of times each experiment is repeated
int n = 16 * 1024 * 1024; // number of ints in the data set
int nbytes = n * sizeof(int); // number of data bytes
dim3 threads, blocks; // kernel launch configuration
float elapsed_time, time_memcpy, time_kernel; // timing variables
float scale_factor = 1.0f;
// allocate generic memory and pin it laster instead of using cudaHostAlloc()
bool bPinGenericMemory = DEFAULT_PINNED_GENERIC_MEMORY; // we want this to be the default behavior
int device_sync_method = cudaDeviceBlockingSync; // by default we use BlockingSync
int niterations; // number of iterations for the loop inside the kernel
printf("[ %s ]\n\n", sSDKsample);
if (checkCmdLineFlag(argc, (const char **)argv, "help")) {
printHelp();
return EXIT_SUCCESS;
}
if ((device_sync_method = getCmdLineArgumentInt(argc, (const char **)argv, "sync_method")) >= 0) {
if (device_sync_method == 0 || device_sync_method == 1 || device_sync_method == 2 || device_sync_method == 4) {
printf("Device synchronization method set to = %s\n", sSyncMethod[device_sync_method]);
printf("Setting reps to 100 to demonstrate steady state\n");
nreps = 100;
}
else {
printf("Invalid command line option sync_method=\"%d\"\n", device_sync_method);
return EXIT_FAILURE;
}
}
else {
printHelp();
return EXIT_SUCCESS;
}
if (checkCmdLineFlag(argc, (const char **)argv, "use_generic_memory")) {
#if defined(__APPLE__) || defined(MACOSX)
bPinGenericMemory = false; // Generic Pinning of System Paged memory not
// currently supported on Mac OSX
#else
bPinGenericMemory = true;
#endif
}
if (checkCmdLineFlag(argc, (const char **)argv, "use_cuda_malloc_host")) {
bPinGenericMemory = false;
}
printf("\n> ");
cuda_device = findCudaDevice(argc, (const char **)argv);
// check the compute capability of the device
int num_devices = 0;
checkCudaErrors(cudaGetDeviceCount(&num_devices));
if (0 == num_devices) {
printf("your system does not have a CUDA capable device, waiving test...\n");
return EXIT_WAIVED;
}
// check if the command-line chosen device ID is within range, exit if not
if (cuda_device >= num_devices) {
printf("cuda_device=%d is invalid, must choose device ID between 0 and %d\n", cuda_device, num_devices - 1);
return EXIT_FAILURE;
}
checkCudaErrors(cudaSetDevice(cuda_device));
// Checking for compute capabilities
cudaDeviceProp deviceProp;
checkCudaErrors(cudaGetDeviceProperties(&deviceProp, cuda_device));
niterations = 5;
// Check if GPU can map host memory (Generic Method), if not then we override
// bPinGenericMemory to be false
if (bPinGenericMemory) {
printf("Device: <%s> canMapHostMemory: %s\n", deviceProp.name, deviceProp.canMapHostMemory ? "Yes" : "No");
if (deviceProp.canMapHostMemory == 0) {
printf("Using cudaMallocHost, CUDA device does not support mapping of "
"generic host memory\n");
bPinGenericMemory = false;
}
}
// Anything that is less than 32 Cores will have scaled down workload
scale_factor =
max((32.0f / (_ConvertSMVer2Cores(deviceProp.major, deviceProp.minor) * (float)deviceProp.multiProcessorCount)),
1.0f);
n = (int)rint((float)n / scale_factor);
printf("> CUDA Capable: SM %d.%d hardware\n", deviceProp.major, deviceProp.minor);
printf("> %d Multiprocessor(s) x %d (Cores/Multiprocessor) = %d (Cores)\n",
deviceProp.multiProcessorCount,
_ConvertSMVer2Cores(deviceProp.major, deviceProp.minor),
_ConvertSMVer2Cores(deviceProp.major, deviceProp.minor) * deviceProp.multiProcessorCount);
printf("> scale_factor = %1.4f\n", 1.0f / scale_factor);
printf("> array_size = %d\n\n", n);
// enable use of blocking sync, to reduce CPU usage
printf("> Using CPU/GPU Device Synchronization method (%s)\n", sDeviceSyncMethod[device_sync_method]);
checkCudaErrors(cudaSetDeviceFlags(device_sync_method | (bPinGenericMemory ? cudaDeviceMapHost : 0)));
// allocate host memory
int c = 5; // value to which the array will be initialized
int *h_a = 0; // pointer to the array data in host memory
int *hAligned_a = 0; // pointer to the array data in host memory (aligned to
// MEMORY_ALIGNMENT)
// Allocate Host memory (could be using cudaMallocHost or VirtualAlloc/mmap if
// using the new CUDA 4.0 features
AllocateHostMemory(bPinGenericMemory, &h_a, &hAligned_a, nbytes);
// Run the full H2D memcopy + kernel + D2H memcopy in a single default stream.
// Returns elapsed time in milliseconds.
float run_default_stream(float* h_in, float* h_out, int n){
float *d_in, *d_out; // device input and output buffers
size_t bytes = n * sizeof(float);
// allocate device memory
int *d_a = 0,
*d_c = 0; // pointers to data and init value in the device memory
checkCudaErrors(cudaMalloc((void **)&d_a, nbytes));
checkCudaErrors(cudaMemset(d_a, 0x0, nbytes));
checkCudaErrors(cudaMalloc((void **)&d_c, sizeof(int)));
checkCudaErrors(cudaMemcpy(d_c, &c, sizeof(int), cudaMemcpyHostToDevice));
cudaMalloc(&d_in, bytes);
cudaMalloc(&d_out, bytes);
printf("\nStarting Test\n");
// create CUDA event handles for timing
cudaEvent_t start, stop;
cudaEventCreate(&start);
cudaEventCreate(&stop);
cudaEventRecord(start);
// copy input to device, run kernel, copy result back
cudaMemcpy(d_in, h_in, bytes, cudaMemcpyHostToDevice);
int grid = (n + BLOCK - 1) / BLOCK;
square_kernel<<<grid, BLOCK>>>(d_in, d_out, n);
cudaMemcpy(h_out, d_out, bytes, cudaMemcpyDeviceToHost);
cudaEventRecord(stop);
cudaEventSynchronize(stop); // block until the event is actually recorded
float ms;
cudaEventElapsedTime(&ms, start, stop);
// release device resources
cudaFree(d_in);
cudaFree(d_out);
cudaEventDestroy(start);
cudaEventDestroy(stop);
return ms;
}
// Run the same workload split across 4 streams so that H2D memcopies,
// kernel execution, and D2H memcopies can overlap on the device.
// Returns elapsed time in milliseconds.
float run_multi_stream(float* h_in, float* h_out, int n){
int chunk = n/NUM_STREAMS; // number of elements per stream
size_t chunk_bytes = chunk * sizeof(float);
float *d_in[NUM_STREAMS], *d_out[NUM_STREAMS]; // per-stream device buffers
cudaStream_t streams[NUM_STREAMS];
// allocate and initialize an array of stream handles
cudaStream_t *streams = (cudaStream_t *)malloc(nstreams * sizeof(cudaStream_t));
for (int i = 0; i < nstreams; i++) {
checkCudaErrors(cudaStreamCreate(&(streams[i])));
for(int i = 0; i < NUM_STREAMS; i++){
cudaStreamCreateWithFlags(&streams[i], cudaStreamNonBlocking);
cudaMalloc(&d_in[i], chunk_bytes);
cudaMalloc(&d_out[i], chunk_bytes);
}
// create CUDA event handles
// use blocking sync
cudaEvent_t start_event, stop_event;
int eventflags = ((device_sync_method == cudaDeviceBlockingSync) ? cudaEventBlockingSync : cudaEventDefault);
// create CUDA event handles for timing
cudaEvent_t start, stop;
cudaEventCreate(&start);
cudaEventCreate(&stop);
checkCudaErrors(cudaEventCreateWithFlags(&start_event, eventflags));
checkCudaErrors(cudaEventCreateWithFlags(&stop_event, eventflags));
cudaEventRecord(start, streams[0]);
// time memcopy from device
checkCudaErrors(cudaEventRecord(start_event, 0)); // record in stream-0, to
// ensure that all previous
// CUDA calls have
// completed
checkCudaErrors(cudaMemcpyAsync(hAligned_a, d_a, nbytes, cudaMemcpyDeviceToHost, streams[0]));
checkCudaErrors(cudaEventRecord(stop_event, 0));
checkCudaErrors(cudaEventSynchronize(stop_event)); // block until the event is actually recorded
checkCudaErrors(cudaEventElapsedTime(&time_memcpy, start_event, stop_event));
printf("memcopy:\t%.2f\n", time_memcpy);
// asynchronously launch 4 copies + kernels + copies, each in its own
// stream so they can overlap on the device
for(int i = 0; i < NUM_STREAMS; i++){
int offset = i * chunk; // element offset into the host arrays for this stream
// time kernel
threads = dim3(512, 1);
blocks = dim3(n / threads.x, 1);
checkCudaErrors(cudaEventRecord(start_event, 0));
init_array<<<blocks, threads, 0, streams[0]>>>(d_a, d_c, niterations);
checkCudaErrors(cudaEventRecord(stop_event, 0));
checkCudaErrors(cudaEventSynchronize(stop_event));
checkCudaErrors(cudaEventElapsedTime(&time_kernel, start_event, stop_event));
printf("kernel:\t\t%.2f\n", time_kernel);
// H2D: copy this stream's chunk to device (non-blocking on host)
cudaMemcpyAsync(
d_in[i],
h_in + offset,
chunk_bytes,
cudaMemcpyHostToDevice,
streams[i]
);
//////////////////////////////////////////////////////////////////////
// time non-streamed execution for reference
threads = dim3(512, 1);
blocks = dim3(n / threads.x, 1);
checkCudaErrors(cudaEventRecord(start_event, 0));
// kernel: will only start after the H2D copy in this stream completes
int grid = (chunk + BLOCK - 1) / BLOCK;
square_kernel<<<grid, BLOCK, 0, streams[i]>>>(
d_in[i], d_out[i], chunk
);
for (int k = 0; k < nreps; k++) {
init_array<<<blocks, threads>>>(d_a, d_c, niterations);
checkCudaErrors(cudaMemcpy(hAligned_a, d_a, nbytes, cudaMemcpyDeviceToHost));
// D2H: copy result back; starts after the kernel in this stream finishes
cudaMemcpyAsync(
h_out + offset,
d_out[i],
chunk_bytes,
cudaMemcpyDeviceToHost,
streams[i]
);
}
checkCudaErrors(cudaEventRecord(stop_event, 0));
checkCudaErrors(cudaEventSynchronize(stop_event));
checkCudaErrors(cudaEventElapsedTime(&elapsed_time, start_event, stop_event));
printf("non-streamed:\t%.2f\n", elapsed_time / nreps);
// Wait for all streams to complete their work
for(int i=0; i < NUM_STREAMS; i++) {
cudaStreamSynchronize(streams[i]);
}
cudaEventRecord(stop, streams[0]);
//////////////////////////////////////////////////////////////////////
// time execution with nstreams streams
threads = dim3(512, 1);
blocks = dim3(n / (nstreams * threads.x), 1);
memset(hAligned_a, 255,
nbytes); // set host memory bits to all 1s, for testing correctness
checkCudaErrors(cudaMemset(d_a, 0, nbytes)); // set device memory to all 0s, for testing correctness
checkCudaErrors(cudaEventRecord(start_event, 0));
// Sync with stream 0, which only completes once all other work
// is done and the stop event is recorded
cudaStreamSynchronize(streams[0]);
for (int k = 0; k < nreps; k++) {
// asynchronously launch nstreams kernels, each operating on its own portion
// of data
for (int i = 0; i < nstreams; i++) {
init_array<<<blocks, threads, 0, streams[i]>>>(d_a + i * n / nstreams, d_c, niterations);
}
float ms;
cudaEventElapsedTime(&ms, start, stop);
// asynchronously launch nstreams memcopies. Note that memcopy in stream x
// will only
// commence executing when all previous CUDA calls in stream x have
// completed
for (int i = 0; i < nstreams; i++) {
checkCudaErrors(cudaMemcpyAsync(hAligned_a + i * n / nstreams,
d_a + i * n / nstreams,
nbytes / nstreams,
cudaMemcpyDeviceToHost,
streams[i]));
}
// release per-stream resources
for(int i=0; i < NUM_STREAMS; i++){
cudaFree(d_in[i]);
cudaFree(d_out[i]);
cudaStreamDestroy(streams[i]);
}
checkCudaErrors(cudaEventRecord(stop_event, 0));
checkCudaErrors(cudaEventSynchronize(stop_event));
checkCudaErrors(cudaEventElapsedTime(&elapsed_time, start_event, stop_event));
printf("%d streams:\t%.2f\n", nstreams, elapsed_time / nreps);
cudaEventDestroy(start);
cudaEventDestroy(stop);
// check whether the output is correct
printf("-------------------------------\n");
bool bResults = correct_data(hAligned_a, n, c * nreps * niterations);
// release resources
for (int i = 0; i < nstreams; i++) {
checkCudaErrors(cudaStreamDestroy(streams[i]));
}
checkCudaErrors(cudaEventDestroy(start_event));
checkCudaErrors(cudaEventDestroy(stop_event));
// Free cudaMallocHost or Generic Host allocated memory (from CUDA 4.0)
FreeHostMemory(bPinGenericMemory, &h_a, &hAligned_a, nbytes);
checkCudaErrors(cudaFree(d_a));
checkCudaErrors(cudaFree(d_c));
return bResults ? EXIT_SUCCESS : EXIT_FAILURE;
return ms;
}
int main(){
printf("[ CUDA Sample: Streams ]\n\n");
// Query compute capability and number of SMs on device 0
int cuda_device = 0;
int major = 0, minor = 0, smCount = 0;
cudaDeviceGetAttribute(&major, cudaDevAttrComputeCapabilityMajor, cuda_device);
cudaDeviceGetAttribute(&minor, cudaDevAttrComputeCapabilityMinor, cuda_device);
cudaDeviceGetAttribute(&smCount, cudaDevAttrMultiProcessorCount, cuda_device);
printf("GPU Device %d: with compute capability %d.%d and Number of SMs %d\n\n",
cuda_device, major, minor, smCount);
size_t bytes = N * sizeof(float);
// allocate pinned host memory: the OS normally moves RAM pages around freely,
// pinning locks these pages in place so the GPU can read them directly
// without the data being moved away mid-transfer
float *h_in = 0; // pointer to input data in host memory
float *h_out = 0; // pointer to output data in host memory
cudaMallocHost(&h_in, bytes);
cudaMallocHost(&h_out, bytes);
// initialize input array
for (int i = 0; i < N; i++)
h_in[i] = (float)i;
//////////////////////////////////////////////////////////////////////
// time single-stream execution for reference
float t1 = run_default_stream(h_in, h_out, N);
//////////////////////////////////////////////////////////////////////
// time execution with 4 streams
float t2 = run_multi_stream(h_in, h_out, N);
printf("Single stream = %.3f ms\n", t1);
printf("Multi-stream = %.3f ms\n", t2);
printf("Speedup = %.2fx\n", t1 / t2);
// release pinned host memory
cudaFreeHost(h_in);
cudaFreeHost(h_out);
return 0;
}