mirror of
https://github.com/NVIDIA/cuda-samples.git
synced 2026-10-13 00:08:26 +08:00
CUDA 13.4 samples update - v13.4-public
Release 13.4 of the CUDA Samples supported by CUDA Toolkit 13.4. See Changelog for more information.
This commit is contained in:
@@ -1,18 +0,0 @@
|
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{
|
||||
"configurations": [
|
||||
{
|
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"name": "Linux",
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||||
"includePath": [
|
||||
"${workspaceFolder}/**",
|
||||
"${workspaceFolder}/../../../Common"
|
||||
],
|
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"defines": [],
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||||
"compilerPath": "/usr/local/cuda/bin/nvcc",
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||||
"cStandard": "gnu17",
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||||
"cppStandard": "gnu++14",
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||||
"intelliSenseMode": "linux-gcc-x64",
|
||||
"configurationProvider": "ms-vscode.makefile-tools"
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||||
}
|
||||
],
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||||
"version": 4
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||||
}
|
||||
@@ -1,7 +0,0 @@
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{
|
||||
"recommendations": [
|
||||
"nvidia.nsight-vscode-edition",
|
||||
"ms-vscode.cpptools",
|
||||
"ms-vscode.makefile-tools"
|
||||
]
|
||||
}
|
||||
@@ -1,34 +1,21 @@
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cmake_minimum_required(VERSION 3.20)
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list(APPEND CMAKE_MODULE_PATH "${CMAKE_CURRENT_SOURCE_DIR}/../../../cmake/Modules")
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||||
|
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include("${CMAKE_CURRENT_SOURCE_DIR}/../../../cmake/DetectCudaArch.cmake")
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if(SAMPLE_SKIP_BUILD)
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return()
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endif()
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project(simpleMultiGPU LANGUAGES C CXX CUDA)
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include("${CMAKE_CURRENT_SOURCE_DIR}/../../../cmake/CudaSampleCommon.cmake")
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find_package(CUDAToolkit REQUIRED)
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||||
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set(CMAKE_POSITION_INDEPENDENT_CODE ON)
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||||
|
||||
set(CMAKE_CUDA_ARCHITECTURES 75 80 86 87 89 90 100 110 120)
|
||||
set(CMAKE_CUDA_FLAGS "${CMAKE_CUDA_FLAGS} -Wno-deprecated-gpu-targets")
|
||||
if(ENABLE_CUDA_DEBUG)
|
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set(CMAKE_CUDA_FLAGS "${CMAKE_CUDA_FLAGS} -G") # enable cuda-gdb (may significantly affect performance on some targets)
|
||||
else()
|
||||
set(CMAKE_CUDA_FLAGS "${CMAKE_CUDA_FLAGS} -lineinfo") # add line information to all builds for debug tools (exclusive to -G option)
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endif()
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# Include directories and libraries
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include_directories(../../../Common)
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# Source file
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# Add target for simpleMultiGPU
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add_executable(simpleMultiGPU simpleMultiGPU.cu)
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target_compile_options(simpleMultiGPU PRIVATE $<$<COMPILE_LANGUAGE:CUDA>:--extended-lambda>)
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target_compile_features(simpleMultiGPU PRIVATE cxx_std_17 cuda_std_17)
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set_target_properties(simpleMultiGPU PROPERTIES CUDA_SEPARABLE_COMPILATION ON)
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|
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# Include installation configuration
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include(${CMAKE_CURRENT_SOURCE_DIR}/../../../cmake/InstallSamples.cmake)
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include(InstallSamples)
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setup_samples_install()
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@@ -1,32 +1,130 @@
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# simpleMultiGPU - Simple Multi-GPU
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# Sample: simpleMultiGPU
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## Description
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This application demonstrates how to use the new CUDA 4.0 API for CUDA context management and multi-threaded access to run CUDA kernels on multiple-GPUs.
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A multi-GPU reduction demo: the input vector is split across every GPU in the system, each
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GPU sums its slice concurrently, and the host combines the per-GPU results. Each GPU gets its
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own CUDA stream, so the H2D copy → reduction kernel → D2H copy pipelines run in parallel across
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devices. The device-side reduction uses `cub::BlockReduce`; the host finishes the sum across
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blocks and across GPUs and checks it against a CPU reference. The whole GPU phase is timed with
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CUDA events.
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## What You'll Learn
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- Enumerating and driving multiple GPUs with `cudaGetDeviceCount` and `cudaSetDevice`
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- Partitioning a workload across GPUs and running them concurrently, one CUDA stream per GPU
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- Overlapping H2D copy, kernel, and D2H copy with `cudaMemcpyAsync` on independent streams
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- Reducing within a block using `cub::BlockReduce`, then finishing the reduction on the host
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- Timing GPU work with CUDA events (`cudaEventRecord` / `cudaEventElapsedTime`)
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- Why pinned host memory (`cudaMallocHost`) is required for `cudaMemcpyAsync` to be asynchronous
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## Key Concepts
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Asynchronous Data Transfers, CUDA Streams and Events, Multithreading, Multi-GPU
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### One Stream per GPU
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## Supported SM Architectures
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The work is held in a `std::vector<TGPUplan>` with one entry per device, each carrying its own stream,
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buffers, and data slice. Selecting a device with `cudaSetDevice` and issuing async work on that
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device's stream lets all GPUs run at the same time:
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||||
|
||||
[SM 5.0 ](https://developer.nvidia.com/cuda-gpus) [SM 5.2 ](https://developer.nvidia.com/cuda-gpus) [SM 5.3 ](https://developer.nvidia.com/cuda-gpus) [SM 6.0 ](https://developer.nvidia.com/cuda-gpus) [SM 6.1 ](https://developer.nvidia.com/cuda-gpus) [SM 7.0 ](https://developer.nvidia.com/cuda-gpus) [SM 7.2 ](https://developer.nvidia.com/cuda-gpus) [SM 7.5 ](https://developer.nvidia.com/cuda-gpus) [SM 8.0 ](https://developer.nvidia.com/cuda-gpus) [SM 8.6 ](https://developer.nvidia.com/cuda-gpus) [SM 8.7 ](https://developer.nvidia.com/cuda-gpus) [SM 8.9 ](https://developer.nvidia.com/cuda-gpus) [SM 9.0 ](https://developer.nvidia.com/cuda-gpus)
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```text
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GPU 0 stream: [H2D slice 0] → [reduceKernel] → [D2H partials 0]
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GPU 1 stream: [H2D slice 1] → [reduceKernel] → [D2H partials 1]
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...
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```
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## Supported OSes
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The host launches every GPU's pipeline before synchronizing any of them, so the copies and kernels
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overlap across devices.
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Linux, Windows
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### Multi-Level Reduction
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## Supported CPU Architecture
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The reduction happens in three stages. On each GPU, `reduceKernel` launches `BLOCK_N` blocks of `THREAD_N`
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threads: every thread accumulates a grid-strided partial sum, then `cub::BlockReduce` combines the
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per-thread partials within its block and thread 0 writes one value per block. The host then adds the
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`BLOCK_N` per-block partials into that GPU's sum, and finally adds the per-GPU sums together.
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x86_64, armv7l
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### Pinned Host Memory
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## CUDA APIs involved
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`cudaMemcpyAsync` only runs asynchronously when the host buffer is page-locked (pinned), so the OS
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cannot move the pages mid-transfer; with ordinary pageable memory the copy falls back to synchronous
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behavior. Both the input slice and the partial-sum buffer are allocated with `cudaMallocHost`.
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### [CUDA Runtime API](http://docs.nvidia.com/cuda/cuda-runtime-api/index.html)
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cudaStreamDestroy, cudaFree, cudaMallocHost, cudaSetDevice, cudaFreeHost, cudaStreamSynchronize, cudaMalloc, cudaMemcpyAsync, cudaStreamCreate, cudaGetDeviceCount
|
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### Timing with CUDA Events
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## Prerequisites
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CUDA events are recorded on device 0's stream to bracket the GPU phase. `cudaEventElapsedTime` returns
|
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the milliseconds between the recorded events.
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||||
|
||||
Download and install the [CUDA Toolkit](https://developer.nvidia.com/cuda-downloads) for your corresponding platform.
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## Key APIs
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## References (for more details)
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||||
### CUDA Runtime
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- `cudaGetDeviceCount` — count the CUDA-capable GPUs in the system
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- `cudaSetDevice` — select the active GPU for subsequent CUDA calls
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- `cudaStreamCreate` / `cudaStreamDestroy` — per-GPU stream that orders each pipeline
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- `cudaMalloc` / `cudaFree` — allocate and free device memory
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||||
- `cudaMallocHost` / `cudaFreeHost` — allocate and free pinned host memory
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||||
- `cudaMemcpyAsync` — non-blocking H2D and D2H transfers on a stream
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||||
- `cudaStreamSynchronize` — block the host until a GPU's stream is done
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||||
- `cudaEventCreate` / `cudaEventRecord` / `cudaEventSynchronize` / `cudaEventElapsedTime` / `cudaEventDestroy` — event-based timing
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||||
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||||
### CCCL / CUB
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- `cub::BlockReduce` — block-wide reduction inside the kernel
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||||
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||||
## Requirements
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||||
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### Hardware
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||||
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||||
- Two or more NVIDIA GPUs with Compute Capability 7.5 or higher
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||||
|
||||
### Software
|
||||
|
||||
- CMake 3.20 or newer
|
||||
- A C++17-capable host compiler
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||||
|
||||
## How to Build
|
||||
|
||||
See the [top-level README](../../../README.md#building-cuda-samples) for full build instructions, including how to build all samples or a single sample standalone.
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||||
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## How to Run
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||||
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||||
```bash
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./simpleMultiGPU
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||||
```
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||||
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No command-line arguments are required. The sample uses every GPU it detects, and exits without
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running if it finds fewer than two.
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## Expected Output
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```text
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||||
Starting simpleMultiGPU
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CUDA-capable device count: 2
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Generating input data...
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Computing with 2 GPUs...
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GPU Processing time: 8.138752 (ms)
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Computing with Host CPU...
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Comparing GPU and Host CPU results...
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GPU sum: 16777294.000000
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CPU sum: 16777294.395033
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Relative difference: 2.354566E-08
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```
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**Reading the output:**
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- The device count and processing time depend on your system
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- The sums are the same every run because the input is filled from an unseeded `rand()`
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- The sample passes when the GPU and CPU results agree to within a relative difference of `1e-5`
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## Files
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||||
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||||
- `simpleMultiGPU.cu` — reduction kernel and the multi-GPU driver
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- `README.md` — this file
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- `CMakeLists.txt` — build configuration
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||||
## See Also
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||||
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||||
- [CUDA Programming Guide — CUDA Streams](https://docs.nvidia.com/cuda/cuda-programming-guide/02-basics/asynchronous-execution.html#cuda-streams)
|
||||
- [CUDA Programming Guide — CUDA Events](https://docs.nvidia.com/cuda/cuda-programming-guide/02-basics/asynchronous-execution.html#cuda-events)
|
||||
- [CUDA Core Compute Libraries — What is CUB?](https://nvidia.github.io/cccl/unstable/cub/index.html#what-is-cub)
|
||||
|
||||
@@ -1,4 +1,4 @@
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||||
/* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved.
|
||||
/* Copyright (c) 2026, NVIDIA CORPORATION. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
@@ -26,46 +26,54 @@
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||||
*/
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||||
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||||
/*
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||||
* This application demonstrates how to use the CUDA API to use multiple GPUs,
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||||
* with an emphasis on simple illustration of the techniques (not on
|
||||
* performance).
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||||
* Sums a large vector across every GPU in the system.
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||||
*
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||||
* Note that in order to detect multiple GPUs in your system you have to disable
|
||||
* SLI in the nvidia control panel. Otherwise only one GPU is visible to the
|
||||
* application. On the other side, you can still extend your desktop to screens
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||||
* attached to both GPUs.
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||||
* The input is split into one slice per GPU, each with its own stream, so the H2D copy,
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||||
* reduction kernel, and D2H copy run concurrently across devices. cub::BlockReduce reduces
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||||
* within each thread block; the host then adds the per-block values into a per-GPU total and
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||||
* combines those into the final sum, checked against a CPU reference. CUDA events time the
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||||
* GPU phase.
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||||
*/
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||||
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||||
// System includes
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#include <assert.h>
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#include <math.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <vector>
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||||
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||||
// CUDA runtime
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#include <cuda_runtime.h>
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||||
// helper functions and utilities to work with CUDA
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#include <helper_cuda.h>
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#include <helper_functions.h>
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||||
// CCCL / CUB block-wide reduction
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#include <cub/cub.cuh>
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#ifndef MAX
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#define MAX(a, b) (a > b ? a : b)
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#endif
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#include "simpleMultiGPU.h"
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////////////////////////////////////////////////////////////////////////////////
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||||
// Data configuration
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||||
////////////////////////////////////////////////////////////////////////////////
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||||
const int MAX_GPU_COUNT = 32;
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const int DATA_N = 1048576 * 32;
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||||
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||||
////////////////////////////////////////////////////////////////////////////////
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||||
// Simple reduction kernel.
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||||
// Refer to the 'reduction' CUDA Sample describing
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||||
// reduction optimization strategies
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||||
////////////////////////////////////////////////////////////////////////////////
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||||
__global__ static void reduceKernel(float *d_Result, float *d_Input, int N)
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||||
// Everything one GPU needs: its slice of the input, its buffers, and its stream
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||||
struct TGPUplan
|
||||
{
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||||
int dataN; // elements assigned to this GPU
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float *h_Data; // pinned input slice
|
||||
float *d_Data; // the slice, on the device
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||||
float *d_Sum; // one partial sum per block
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||||
float *h_Sum_from_device; // those partial sums, copied back
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||||
cudaStream_t stream; // orders this GPU's copies and kernel
|
||||
};
|
||||
|
||||
// Data configuration
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||||
constexpr int DATA_N = 1048576 * 32;
|
||||
|
||||
// Reduction launch configuration
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||||
constexpr int BLOCK_N = 32; // thread blocks launched per GPU
|
||||
constexpr int THREAD_N = 256; // threads per block
|
||||
|
||||
// Per-block reduction kernel.
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||||
// Threads walk the input in a grid-stride loop, then cub::BlockReduce combines their totals.
|
||||
// Thread 0 writes one partial sum per block (BLOCK_N values total); the host
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||||
// adds those up to obtain this GPU's final sum.
|
||||
__global__ static void reduceKernel(float *d_Result, const float *d_Input, int N)
|
||||
{
|
||||
using BlockReduce = cub::BlockReduce<float, THREAD_N>;
|
||||
__shared__ typename BlockReduce::TempStorage temp_storage;
|
||||
|
||||
const int tid = blockIdx.x * blockDim.x + threadIdx.x;
|
||||
const int threadN = gridDim.x * blockDim.x;
|
||||
float sum = 0;
|
||||
@@ -73,160 +81,145 @@ __global__ static void reduceKernel(float *d_Result, float *d_Input, int N)
|
||||
for (int pos = tid; pos < N; pos += threadN)
|
||||
sum += d_Input[pos];
|
||||
|
||||
d_Result[tid] = sum;
|
||||
// Reduce the per-thread partial sums across the block (result valid in thread 0)
|
||||
sum = BlockReduce(temp_storage).Sum(sum);
|
||||
|
||||
if (threadIdx.x == 0)
|
||||
d_Result[blockIdx.x] = sum;
|
||||
}
|
||||
|
||||
////////////////////////////////////////////////////////////////////////////////
|
||||
// Program main
|
||||
////////////////////////////////////////////////////////////////////////////////
|
||||
int main(int argc, char **argv)
|
||||
int main()
|
||||
{
|
||||
// Solver config
|
||||
TGPUplan plan[MAX_GPU_COUNT];
|
||||
|
||||
// GPU reduction results
|
||||
float h_SumGPU[MAX_GPU_COUNT];
|
||||
|
||||
float sumGPU;
|
||||
double sumCPU, diff;
|
||||
|
||||
int i, j, gpuBase, GPU_N;
|
||||
|
||||
const int BLOCK_N = 32;
|
||||
const int THREAD_N = 256;
|
||||
const int ACCUM_N = BLOCK_N * THREAD_N;
|
||||
|
||||
printf("Starting simpleMultiGPU\n");
|
||||
checkCudaErrors(cudaGetDeviceCount(&GPU_N));
|
||||
|
||||
if (GPU_N > MAX_GPU_COUNT) {
|
||||
GPU_N = MAX_GPU_COUNT;
|
||||
int deviceCount = 0;
|
||||
cudaGetDeviceCount(&deviceCount);
|
||||
|
||||
printf("CUDA-capable device count: %i\n", deviceCount);
|
||||
|
||||
// This sample needs at least two GPUs to show work running on several devices at once
|
||||
if (deviceCount < 2) {
|
||||
printf("Two or more CUDA-capable devices are required. Exiting.\n");
|
||||
return EXIT_SUCCESS;
|
||||
}
|
||||
|
||||
printf("CUDA-capable device count: %i\n", GPU_N);
|
||||
|
||||
printf("Generating input data...\n\n");
|
||||
|
||||
std::vector<TGPUplan> plan(deviceCount);
|
||||
std::vector<float> h_SumGPU(deviceCount); // one result per GPU
|
||||
|
||||
// Subdividing input data across GPUs
|
||||
// Get data sizes for each GPU
|
||||
for (i = 0; i < GPU_N; i++) {
|
||||
plan[i].dataN = DATA_N / GPU_N;
|
||||
for (int i = 0; i < deviceCount; i++) {
|
||||
plan[i].dataN = DATA_N / deviceCount;
|
||||
}
|
||||
|
||||
// Take into account "odd" data sizes
|
||||
for (i = 0; i < DATA_N % GPU_N; i++) {
|
||||
for (int i = 0; i < DATA_N % deviceCount; i++) {
|
||||
plan[i].dataN++;
|
||||
}
|
||||
|
||||
// Assign data ranges to GPUs
|
||||
gpuBase = 0;
|
||||
|
||||
for (i = 0; i < GPU_N; i++) {
|
||||
plan[i].h_Sum = h_SumGPU + i;
|
||||
gpuBase += plan[i].dataN;
|
||||
}
|
||||
|
||||
// Create streams for issuing GPU command asynchronously and allocate memory
|
||||
// (GPU and System page-locked)
|
||||
for (i = 0; i < GPU_N; i++) {
|
||||
checkCudaErrors(cudaSetDevice(i));
|
||||
checkCudaErrors(cudaStreamCreate(&plan[i].stream));
|
||||
// Allocate memory
|
||||
checkCudaErrors(cudaMalloc((void **)&plan[i].d_Data, plan[i].dataN * sizeof(float)));
|
||||
checkCudaErrors(cudaMalloc((void **)&plan[i].d_Sum, ACCUM_N * sizeof(float)));
|
||||
checkCudaErrors(cudaMallocHost((void **)&plan[i].h_Sum_from_device, ACCUM_N * sizeof(float)));
|
||||
checkCudaErrors(cudaMallocHost((void **)&plan[i].h_Data, plan[i].dataN * sizeof(float)));
|
||||
for (int i = 0; i < deviceCount; i++) {
|
||||
cudaSetDevice(i);
|
||||
cudaStreamCreate(&plan[i].stream);
|
||||
|
||||
for (j = 0; j < plan[i].dataN; j++) {
|
||||
cudaMalloc(&plan[i].d_Data, plan[i].dataN * sizeof(float));
|
||||
cudaMalloc(&plan[i].d_Sum, BLOCK_N * sizeof(float));
|
||||
cudaMallocHost(&plan[i].h_Sum_from_device, BLOCK_N * sizeof(float));
|
||||
cudaMallocHost(&plan[i].h_Data, plan[i].dataN * sizeof(float));
|
||||
|
||||
for (int j = 0; j < plan[i].dataN; j++) {
|
||||
plan[i].h_Data[j] = (float)rand() / (float)RAND_MAX;
|
||||
}
|
||||
}
|
||||
|
||||
// Start timing and compute on GPU(s)
|
||||
printf("Computing with %d GPUs...\n", GPU_N);
|
||||
// create and start timer
|
||||
StopWatchInterface *timer = NULL;
|
||||
sdkCreateTimer(&timer);
|
||||
printf("Computing with %d GPUs...\n", deviceCount);
|
||||
// Time the multi-GPU work with CUDA events (recorded on device 0)
|
||||
cudaEvent_t start, stop;
|
||||
cudaSetDevice(0);
|
||||
cudaEventCreate(&start);
|
||||
cudaEventCreate(&stop);
|
||||
cudaEventRecord(start);
|
||||
|
||||
// start the timer
|
||||
sdkStartTimer(&timer);
|
||||
|
||||
// Copy data to GPU, launch the kernel and copy data back. All asynchronously
|
||||
for (i = 0; i < GPU_N; i++) {
|
||||
// Set device
|
||||
checkCudaErrors(cudaSetDevice(i));
|
||||
// Queue every GPU's copy-in, kernel and copy-out before waiting on any of them,
|
||||
// so the devices run concurrently instead of one after another
|
||||
for (int i = 0; i < deviceCount; i++) {
|
||||
TGPUplan &gpu = plan[i];
|
||||
cudaSetDevice(i);
|
||||
|
||||
// Copy input data from CPU
|
||||
checkCudaErrors(cudaMemcpyAsync(
|
||||
plan[i].d_Data, plan[i].h_Data, plan[i].dataN * sizeof(float), cudaMemcpyHostToDevice, plan[i].stream));
|
||||
cudaMemcpyAsync(gpu.d_Data, gpu.h_Data, gpu.dataN * sizeof(float), cudaMemcpyHostToDevice, gpu.stream);
|
||||
|
||||
// Perform GPU computations
|
||||
reduceKernel<<<BLOCK_N, THREAD_N, 0, plan[i].stream>>>(plan[i].d_Sum, plan[i].d_Data, plan[i].dataN);
|
||||
getLastCudaError("reduceKernel() execution failed.\n");
|
||||
// Launch Kernel
|
||||
reduceKernel<<<BLOCK_N, THREAD_N, 0, gpu.stream>>>(gpu.d_Sum, gpu.d_Data, gpu.dataN);
|
||||
|
||||
// Read back GPU results
|
||||
checkCudaErrors(cudaMemcpyAsync(
|
||||
plan[i].h_Sum_from_device, plan[i].d_Sum, ACCUM_N * sizeof(float), cudaMemcpyDeviceToHost, plan[i].stream));
|
||||
cudaMemcpyAsync(gpu.h_Sum_from_device, gpu.d_Sum, BLOCK_N * sizeof(float), cudaMemcpyDeviceToHost, gpu.stream);
|
||||
}
|
||||
|
||||
// Process GPU results
|
||||
for (i = 0; i < GPU_N; i++) {
|
||||
float sum;
|
||||
|
||||
// Set device
|
||||
checkCudaErrors(cudaSetDevice(i));
|
||||
for (int i = 0; i < deviceCount; i++) {
|
||||
cudaSetDevice(i);
|
||||
|
||||
// Wait for all operations to finish
|
||||
cudaStreamSynchronize(plan[i].stream);
|
||||
|
||||
// Finalize GPU reduction for current subvector
|
||||
sum = 0;
|
||||
float sum = 0;
|
||||
|
||||
for (j = 0; j < ACCUM_N; j++) {
|
||||
for (int j = 0; j < BLOCK_N; j++) {
|
||||
sum += plan[i].h_Sum_from_device[j];
|
||||
}
|
||||
|
||||
*(plan[i].h_Sum) = (float)sum;
|
||||
h_SumGPU[i] = sum;
|
||||
|
||||
// Shut down this GPU
|
||||
checkCudaErrors(cudaFreeHost(plan[i].h_Sum_from_device));
|
||||
checkCudaErrors(cudaFree(plan[i].d_Sum));
|
||||
checkCudaErrors(cudaFree(plan[i].d_Data));
|
||||
checkCudaErrors(cudaStreamDestroy(plan[i].stream));
|
||||
// Free up this GPU's resources. h_Data stays alive for the CPU check below.
|
||||
cudaFreeHost(plan[i].h_Sum_from_device);
|
||||
cudaFree(plan[i].d_Sum);
|
||||
cudaFree(plan[i].d_Data);
|
||||
cudaStreamDestroy(plan[i].stream);
|
||||
}
|
||||
|
||||
sumGPU = 0;
|
||||
float sumGPU = 0;
|
||||
|
||||
for (i = 0; i < GPU_N; i++) {
|
||||
for (int i = 0; i < deviceCount; i++) {
|
||||
sumGPU += h_SumGPU[i];
|
||||
}
|
||||
|
||||
sdkStopTimer(&timer);
|
||||
printf(" GPU Processing time: %f (ms)\n\n", sdkGetTimerValue(&timer));
|
||||
sdkDeleteTimer(&timer);
|
||||
cudaSetDevice(0);
|
||||
cudaEventRecord(stop);
|
||||
cudaEventSynchronize(stop);
|
||||
|
||||
float gpuTime = 0;
|
||||
cudaEventElapsedTime(&gpuTime, start, stop);
|
||||
printf(" GPU Processing time: %f (ms)\n\n", gpuTime);
|
||||
cudaEventDestroy(start);
|
||||
cudaEventDestroy(stop);
|
||||
|
||||
// Compute on Host CPU
|
||||
printf("Computing with Host CPU...\n\n");
|
||||
|
||||
sumCPU = 0;
|
||||
double sumCPU = 0;
|
||||
|
||||
for (i = 0; i < GPU_N; i++) {
|
||||
for (j = 0; j < plan[i].dataN; j++) {
|
||||
for (int i = 0; i < deviceCount; i++) {
|
||||
for (int j = 0; j < plan[i].dataN; j++) {
|
||||
sumCPU += plan[i].h_Data[j];
|
||||
}
|
||||
}
|
||||
|
||||
// Compare GPU and CPU results
|
||||
printf("Comparing GPU and Host CPU results...\n");
|
||||
diff = fabs(sumCPU - sumGPU) / fabs(sumCPU);
|
||||
const double diff = fabs(sumCPU - sumGPU) / fabs(sumCPU);
|
||||
printf(" GPU sum: %f\n CPU sum: %f\n", sumGPU, sumCPU);
|
||||
printf(" Relative difference: %E \n\n", diff);
|
||||
|
||||
// Cleanup and shutdown
|
||||
for (i = 0; i < GPU_N; i++) {
|
||||
checkCudaErrors(cudaSetDevice(i));
|
||||
checkCudaErrors(cudaFreeHost(plan[i].h_Data));
|
||||
for (int i = 0; i < deviceCount; i++) {
|
||||
cudaFreeHost(plan[i].h_Data);
|
||||
}
|
||||
|
||||
exit((diff < 1e-5) ? EXIT_SUCCESS : EXIT_FAILURE);
|
||||
return (diff < 1e-5) ? EXIT_SUCCESS : EXIT_FAILURE;
|
||||
}
|
||||
|
||||
@@ -1,62 +0,0 @@
|
||||
/* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of NVIDIA CORPORATION nor the names of its
|
||||
* contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
||||
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
|
||||
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
|
||||
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
|
||||
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
|
||||
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
|
||||
* OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
/*
|
||||
* This application demonstrates how to use the CUDA API to use multiple GPUs.
|
||||
*
|
||||
* Note that in order to detect multiple GPUs in your system you have to disable
|
||||
* SLI in the nvidia control panel. Otherwise only one GPU is visible to the
|
||||
* application. On the other side, you can still extend your desktop to screens
|
||||
* attached to both GPUs.
|
||||
*/
|
||||
|
||||
#ifndef SIMPLEMULTIGPU_H
|
||||
#define SIMPLEMULTIGPU_H
|
||||
|
||||
typedef struct
|
||||
{
|
||||
// Host-side input data
|
||||
int dataN;
|
||||
float *h_Data;
|
||||
|
||||
// Partial sum for this GPU
|
||||
float *h_Sum;
|
||||
|
||||
// Device buffers
|
||||
float *d_Data, *d_Sum;
|
||||
|
||||
// Reduction copied back from GPU
|
||||
float *h_Sum_from_device;
|
||||
|
||||
// Stream for asynchronous command execution
|
||||
cudaStream_t stream;
|
||||
|
||||
} TGPUplan;
|
||||
|
||||
extern "C" void launch_reduceKernel(float *d_Result, float *d_Input, int N, int BLOCK_N, int THREAD_N, cudaStream_t &s);
|
||||
|
||||
#endif
|
||||
Reference in New Issue
Block a user