Add and update samples for cuda 11.0 support

2026-10-23 21:28:17 +08:00 · 2020-05-18 22:22:06 +05:30
parent 6be514679b
commit 4f6e02970b
410 changed files with 21920 additions and 3864 deletions
--- a/Samples/immaTensorCoreGemm/Makefile
+++ b/Samples/immaTensorCoreGemm/Makefile
@@ -72,9 +72,9 @@ endif
 # architecture
 HOST_ARCH   := $(shell uname -m)
 TARGET_ARCH ?= $(HOST_ARCH)
-ifneq (,$(filter $(TARGET_ARCH),x86_64 aarch64 ppc64le armv7l))
+ifneq (,$(filter $(TARGET_ARCH),x86_64 aarch64 sbsa ppc64le armv7l))
    ifneq ($(TARGET_ARCH),$(HOST_ARCH))
-        ifneq (,$(filter $(TARGET_ARCH),x86_64 aarch64 ppc64le))
+        ifneq (,$(filter $(TARGET_ARCH),x86_64 aarch64 sbsa ppc64le))
            TARGET_SIZE := 64
        else ifneq (,$(filter $(TARGET_ARCH),armv7l))
            TARGET_SIZE := 32
@@ -85,8 +85,17 @@ ifneq (,$(filter $(TARGET_ARCH),x86_64 aarch64 ppc64le armv7l))
 else
    $(error ERROR - unsupported value $(TARGET_ARCH) for TARGET_ARCH!)
 endif
+
+# sbsa and aarch64 systems look similar. Need to differentiate them at host level for now.
+ifeq ($(HOST_ARCH),aarch64)
+    ifeq ($(CUDA_PATH)/targets/sbsa-linux,$(shell ls -1d $(CUDA_PATH)/targets/sbsa-linux))
+        HOST_ARCH := sbsa
+        TARGET_ARCH := sbsa
+    endif
+endif
+
 ifneq ($(TARGET_ARCH),$(HOST_ARCH))
-    ifeq (,$(filter $(HOST_ARCH)-$(TARGET_ARCH),aarch64-armv7l x86_64-armv7l x86_64-aarch64 x86_64-ppc64le))
+    ifeq (,$(filter $(HOST_ARCH)-$(TARGET_ARCH),aarch64-armv7l x86_64-armv7l x86_64-aarch64 x86_64-sbsa x86_64-ppc64le))
        $(error ERROR - cross compiling from $(HOST_ARCH) to $(TARGET_ARCH) is not supported!)
    endif
 endif
@@ -141,6 +150,8 @@ else ifneq ($(TARGET_ARCH),$(HOST_ARCH))
        else ifeq ($(TARGET_OS), android)
            HOST_COMPILER ?= aarch64-linux-android-clang++
        endif
+    else ifeq ($(TARGET_ARCH),sbsa)
+        HOST_COMPILER ?= aarch64-linux-gnu-g++
    else ifeq ($(TARGET_ARCH),ppc64le)
        HOST_COMPILER ?= powerpc64le-linux-gnu-g++
    endif
@@ -185,19 +196,27 @@ ifneq ($(TARGET_ARCH),$(HOST_ARCH))
                CCFLAGS += --sysroot=$(TARGET_FS)
            endif
            LDFLAGS += --sysroot=$(TARGET_FS)
-            LDFLAGS += -rpath-link=$(TARGET_FS)/lib -L $(TARGET_FS)/lib
-            LDFLAGS += -rpath-link=$(TARGET_FS)/usr/lib -L $(TARGET_FS)/usr/lib
-            LDFLAGS += -rpath-link=$(TARGET_FS)/usr/lib/aarch64-linux-gnu -L $(TARGET_FS)/usr/lib/aarch64-linux-gnu
+            LDFLAGS += -rpath-link=$(TARGET_FS)/lib -L$(TARGET_FS)/lib
+            LDFLAGS += -rpath-link=$(TARGET_FS)/lib/aarch64-linux-gnu -L$(TARGET_FS)/lib/aarch64-linux-gnu
+            LDFLAGS += -rpath-link=$(TARGET_FS)/usr/lib -L$(TARGET_FS)/usr/lib
+            LDFLAGS += -rpath-link=$(TARGET_FS)/usr/lib/aarch64-linux-gnu -L$(TARGET_FS)/usr/lib/aarch64-linux-gnu
            LDFLAGS += --unresolved-symbols=ignore-in-shared-libs
-            CCFLAGS += -isystem=$(TARGET_FS)/usr/include
-            CCFLAGS += -isystem=$(TARGET_FS)/usr/include/aarch64-linux-gnu
+            CCFLAGS += -isystem=$(TARGET_FS)/usr/include  -I$(TARGET_FS)/usr/include
+            CCFLAGS += -isystem=$(TARGET_FS)/usr/include/aarch64-linux-gnu -I$(TARGET_FS)/usr/include/aarch64-linux-gnu
+        endif
+    endif
+    ifeq ($(TARGET_ARCH)-$(TARGET_OS),aarch64-qnx)
+        CCFLAGS += -DWIN_INTERFACE_CUSTOM -I/usr/include/aarch64-qnx-gnu
+        LDFLAGS += -lsocket
+        LDFLAGS += -rpath=/usr/lib/aarch64-qnx-gnu -L/usr/lib/aarch64-qnx-gnu
+        ifneq ($(TARGET_FS),)
+            LDFLAGS += -rpath=$(TARGET_FS)/usr/lib -L $(TARGET_FS)/usr/lib
+            LDFLAGS += -rpath=$(TARGET_FS)/usr/libnvidia -L $(TARGET_FS)/usr/libnvidia
+        endif
+        ifdef TARGET_OVERRIDE # cuda toolkit targets override
+            NVCCFLAGS += -target-dir $(TARGET_OVERRIDE)
        endif
    endif
-endif
-
-ifeq ($(TARGET_OS),qnx)
-    CCFLAGS += -DWIN_INTERFACE_CUSTOM
-    LDFLAGS += -lsocket
 endif

 # Install directory of different arch
@@ -206,6 +225,8 @@ ifeq ($(TARGET_ARCH)-$(TARGET_OS),armv7l-linux)
    CUDA_INSTALL_TARGET_DIR = targets/armv7-linux-gnueabihf/
 else ifeq ($(TARGET_ARCH)-$(TARGET_OS),aarch64-linux)
    CUDA_INSTALL_TARGET_DIR = targets/aarch64-linux/
+else ifeq ($(TARGET_ARCH)-$(TARGET_OS),sbsa-linux)
+    CUDA_INSTALL_TARGET_DIR = targets/sbsa-linux/
 else ifeq ($(TARGET_ARCH)-$(TARGET_OS),armv7l-android)
    CUDA_INSTALL_TARGET_DIR = targets/armv7-linux-androideabi/
 else ifeq ($(TARGET_ARCH)-$(TARGET_OS),aarch64-android)
@@ -259,9 +280,9 @@ LIBRARIES :=

 # Gencode arguments
 ifeq ($(TARGET_ARCH),$(filter $(TARGET_ARCH),armv7l aarch64))
-SMS ?= 72 75
+SMS ?= 72 75 80
 else
-SMS ?= 75
+SMS ?= 75 80
 endif

 ifeq ($(SMS),)
--- a/Samples/immaTensorCoreGemm/NsightEclipse.xml
+++ b/Samples/immaTensorCoreGemm/NsightEclipse.xml
@@ -40,6 +40,7 @@
  </scopes>
  <sm-arch>sm72</sm-arch>
  <sm-arch>sm75</sm-arch>
+  <sm-arch>sm80</sm-arch>
  <supported_envs>
    <env>
      <arch>x86_64</arch>
--- a/Samples/immaTensorCoreGemm/README.md
+++ b/Samples/immaTensorCoreGemm/README.md
@@ -10,7 +10,7 @@ Matrix Multiply, WMMA, Tensor Cores

 ## Supported SM Architectures

-[SM 7.2 ](https://developer.nvidia.com/cuda-gpus)  [SM 7.5 ](https://developer.nvidia.com/cuda-gpus)
+[SM 7.2 ](https://developer.nvidia.com/cuda-gpus)  [SM 7.5 ](https://developer.nvidia.com/cuda-gpus)  [SM 8.0 ](https://developer.nvidia.com/cuda-gpus)

 ## Supported OSes

@@ -27,7 +27,7 @@ cudaMallocManaged, cudaDeviceSynchronize, cudaFuncSetAttribute, cudaEventCreate,

 ## Prerequisites

-Download and install the [CUDA Toolkit 10.2](https://developer.nvidia.com/cuda-downloads) for your corresponding platform.
+Download and install the [CUDA Toolkit 11.0](https://developer.nvidia.com/cuda-downloads) for your corresponding platform.

 ## Build and Run

--- a/Samples/immaTensorCoreGemm/immaTensorCoreGemm.cu
+++ b/Samples/immaTensorCoreGemm/immaTensorCoreGemm.cu
@@ -160,11 +160,11 @@
 // columns. For shared memory, such access can result in bank conflicts if
 // different rows / columns of the matrix map to the same bank. By shifting each
 // row and column by a few bytes, we make sure that they map to different banks,
-// thus reducing the number of possible bank conflicts. The number of 16
+// thus reducing the number of possible bank conflicts. The number of 32
 // one-byte "uint8_t" elements is chosen as the minimum possible shift because
-// we must keep each row and column 128-bit aligned, as required by
+// we must keep each row and column 256-bit aligned, as required by
 // nvcuda::wmma::load_matrix_sync.
-#define SKEW_UINT8 16
+#define SKEW_UINT8 32

 #define checkKernelErrors(expr)                             \
  do {                                                      \
--- a/Samples/immaTensorCoreGemm/immaTensorCoreGemm_vs2012.vcxproj
+++ b/Samples/immaTensorCoreGemm/immaTensorCoreGemm_vs2012.vcxproj
@@ -62,7 +62,7 @@
      <OutputFile>$(OutDir)/immaTensorCoreGemm.exe</OutputFile>
    </Link>
    <CudaCompile>
-      <CodeGeneration>compute_75,sm_75;</CodeGeneration>
+      <CodeGeneration>compute_75,sm_75;compute_80,sm_80;</CodeGeneration>
      <AdditionalOptions>-Xcompiler "/wd 4819" %(AdditionalOptions)</AdditionalOptions>
      <Include>./;../../Common</Include>
      <Defines>WIN32</Defines>
--- a/Samples/immaTensorCoreGemm/immaTensorCoreGemm_vs2013.vcxproj
+++ b/Samples/immaTensorCoreGemm/immaTensorCoreGemm_vs2013.vcxproj
@@ -62,7 +62,7 @@
      <OutputFile>$(OutDir)/immaTensorCoreGemm.exe</OutputFile>
    </Link>
    <CudaCompile>
-      <CodeGeneration>compute_75,sm_75;</CodeGeneration>
+      <CodeGeneration>compute_75,sm_75;compute_80,sm_80;</CodeGeneration>
      <AdditionalOptions>-Xcompiler "/wd 4819" %(AdditionalOptions)</AdditionalOptions>
      <Include>./;../../Common</Include>
      <Defines>WIN32</Defines>
--- a/Samples/immaTensorCoreGemm/immaTensorCoreGemm_vs2015.vcxproj
+++ b/Samples/immaTensorCoreGemm/immaTensorCoreGemm_vs2015.vcxproj
@@ -62,7 +62,7 @@
      <OutputFile>$(OutDir)/immaTensorCoreGemm.exe</OutputFile>
    </Link>
    <CudaCompile>
-      <CodeGeneration>compute_75,sm_75;</CodeGeneration>
+      <CodeGeneration>compute_75,sm_75;compute_80,sm_80;</CodeGeneration>
      <AdditionalOptions>-Xcompiler "/wd 4819" %(AdditionalOptions)</AdditionalOptions>
      <Include>./;../../Common</Include>
      <Defines>WIN32</Defines>
--- a/Samples/immaTensorCoreGemm/immaTensorCoreGemm_vs2017.vcxproj
+++ b/Samples/immaTensorCoreGemm/immaTensorCoreGemm_vs2017.vcxproj
@@ -67,7 +67,7 @@
      <OutputFile>$(OutDir)/immaTensorCoreGemm.exe</OutputFile>
    </Link>
    <CudaCompile>
-      <CodeGeneration>compute_75,sm_75;</CodeGeneration>
+      <CodeGeneration>compute_75,sm_75;compute_80,sm_80;</CodeGeneration>
      <AdditionalOptions>-Xcompiler "/wd 4819" %(AdditionalOptions)</AdditionalOptions>
      <Include>./;../../Common</Include>
      <Defines>WIN32</Defines>
--- a/Samples/immaTensorCoreGemm/immaTensorCoreGemm_vs2019.vcxproj
+++ b/Samples/immaTensorCoreGemm/immaTensorCoreGemm_vs2019.vcxproj
@@ -63,7 +63,7 @@
      <OutputFile>$(OutDir)/immaTensorCoreGemm.exe</OutputFile>
    </Link>
    <CudaCompile>
-      <CodeGeneration>compute_75,sm_75;</CodeGeneration>
+      <CodeGeneration>compute_75,sm_75;compute_80,sm_80;</CodeGeneration>
      <AdditionalOptions>-Xcompiler "/wd 4819" %(AdditionalOptions)</AdditionalOptions>
      <Include>./;../../Common</Include>
      <Defines>WIN32</Defines>