add and update samples for CUDA 11.6

Samples/2_Concepts_and_Techniques/dct8x8/.vscode/c_cpp_properties.json

@@ -0,0 +1,18 @@
+{
+    "configurations": [
+        {
+            "name": "Linux",
+            "includePath": [
+                "${workspaceFolder}/**",
+                "${workspaceFolder}/../../../Common"
+            ],
+            "defines": [],
+            "compilerPath": "/usr/local/cuda/bin/nvcc",
+            "cStandard": "gnu17",
+            "cppStandard": "gnu++14",
+            "intelliSenseMode": "linux-gcc-x64",
+            "configurationProvider": "ms-vscode.makefile-tools"
+        }
+    ],
+    "version": 4
+}

Samples/2_Concepts_and_Techniques/dct8x8/.vscode/extensions.json

@@ -0,0 +1,7 @@
+{
+    "recommendations": [
+        "nvidia.nsight-vscode-edition",
+        "ms-vscode.cpptools",
+        "ms-vscode.makefile-tools"
+    ]
+}

Samples/2_Concepts_and_Techniques/dct8x8/.vscode/launch.json

@@ -0,0 +1,10 @@
+{
+    "configurations": [
+        {
+            "name": "CUDA C++: Launch",
+            "type": "cuda-gdb",
+            "request": "launch",
+            "program": "${workspaceFolder}/dct8x8"
+        }
+    ]
+}

Samples/2_Concepts_and_Techniques/dct8x8/.vscode/tasks.json

@@ -0,0 +1,15 @@
+{
+    "version": "2.0.0",
+    "tasks": [
+        {
+            "label": "sample",
+            "type": "shell",
+            "command": "make dbg=1",
+            "problemMatcher": ["$nvcc"],
+            "group": {
+                "kind": "build",
+                "isDefault": true
+            }
+        }
+    ]
+}

Samples/2_Concepts_and_Techniques/dct8x8/BmpUtil.cpp

@@ -0,0 +1,455 @@
+/* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *  * Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  * Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *  * Neither the name of NVIDIA CORPORATION nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+**************************************************************************
+* \file BmpUtil.cpp
+* \brief Contains basic image operations implementation.
+*
+* This file contains implementation of basic bitmap loading, saving,
+* conversions to different representations and memory management routines.
+*/
+
+#include "Common.h"
+#include "BmpUtil.h"
+
+#if defined(WIN32) || defined(_WIN32) || defined(WIN64) || defined(_WIN64)
+#pragma warning(disable : 4996)  // disable deprecated warning
+#endif
+
+/**
+**************************************************************************
+*  The routine clamps the input value to integer byte range [0, 255]
+*
+* \param x          [IN] - Input value
+*
+* \return Pointer to the created plane
+*/
+int clamp_0_255(int x) { return (x < 0) ? 0 : ((x > 255) ? 255 : x); }
+
+/**
+**************************************************************************
+*  Float round to nearest value
+*
+* \param num            [IN] - Float value to round
+*
+* \return The closest to the input float integer value
+*/
+float round_f(float num) {
+  float NumAbs = fabs(num);
+  int NumAbsI = (int)(NumAbs + 0.5f);
+  float sign = num > 0 ? 1.0f : -1.0f;
+  return sign * NumAbsI;
+}
+
+/**
+**************************************************************************
+*  Memory allocator, returns aligned format frame with 8bpp pixels.
+*
+* \param width          [IN] - Width of image buffer to be allocated
+* \param height         [IN] - Height of image buffer to be allocated
+* \param pStepBytes     [OUT] - Step between two sequential rows
+*
+* \return Pointer to the created plane
+*/
+byte *MallocPlaneByte(int width, int height, int *pStepBytes) {
+  byte *ptr;
+  *pStepBytes = ((int)ceil(width / 16.0f)) * 16;
+  //#ifdef __ALLOW_ALIGNED_MEMORY_MANAGEMENT
+  //  ptr = (byte *)_aligned_malloc(*pStepBytes * height, 16);
+  //#else
+  ptr = (byte *)malloc(*pStepBytes * height);
+  //#endif
+  return ptr;
+}
+
+/**
+**************************************************************************
+*  Memory allocator, returns aligned format frame with 16bpp float pixels.
+*
+* \param width          [IN] - Width of image buffer to be allocated
+* \param height         [IN] - Height of image buffer to be allocated
+* \param pStepBytes     [OUT] - Step between two sequential rows
+*
+* \return Pointer to the created plane
+*/
+short *MallocPlaneShort(int width, int height, int *pStepBytes) {
+  short *ptr;
+  *pStepBytes = ((int)ceil((width * sizeof(short)) / 16.0f)) * 16;
+  //#ifdef __ALLOW_ALIGNED_MEMORY_MANAGEMENT
+  //  ptr = (float *)_aligned_malloc(*pStepBytes * height, 16);
+  //#else
+  ptr = (short *)malloc(*pStepBytes * height);
+  //#endif
+  *pStepBytes = *pStepBytes / sizeof(short);
+  return ptr;
+}
+
+/**
+**************************************************************************
+*  Memory allocator, returns aligned format frame with 32bpp float pixels.
+*
+* \param width          [IN] - Width of image buffer to be allocated
+* \param height         [IN] - Height of image buffer to be allocated
+* \param pStepBytes     [OUT] - Step between two sequential rows
+*
+* \return Pointer to the created plane
+*/
+float *MallocPlaneFloat(int width, int height, int *pStepBytes) {
+  float *ptr;
+  *pStepBytes = ((int)ceil((width * sizeof(float)) / 16.0f)) * 16;
+  //#ifdef __ALLOW_ALIGNED_MEMORY_MANAGEMENT
+  //  ptr = (float *)_aligned_malloc(*pStepBytes * height, 16);
+  //#else
+  ptr = (float *)malloc(*pStepBytes * height);
+  //#endif
+  *pStepBytes = *pStepBytes / sizeof(float);
+  return ptr;
+}
+
+/**
+**************************************************************************
+*  Copies byte plane to float plane
+*
+* \param ImgSrc             [IN] - Source byte plane
+* \param StrideB            [IN] - Source plane stride
+* \param ImgDst             [OUT] - Destination float plane
+* \param StrideF            [IN] - Destination plane stride
+* \param Size               [IN] - Size of area to copy
+*
+* \return None
+*/
+void CopyByte2Float(byte *ImgSrc, int StrideB, float *ImgDst, int StrideF,
+                    ROI Size) {
+  for (int i = 0; i < Size.height; i++) {
+    for (int j = 0; j < Size.width; j++) {
+      ImgDst[i * StrideF + j] = (float)ImgSrc[i * StrideB + j];
+    }
+  }
+}
+
+/**
+**************************************************************************
+*  Copies float plane to byte plane (with clamp)
+*
+* \param ImgSrc             [IN] - Source float plane
+* \param StrideF            [IN] - Source plane stride
+* \param ImgDst             [OUT] - Destination byte plane
+* \param StrideB            [IN] - Destination plane stride
+* \param Size               [IN] - Size of area to copy
+*
+* \return None
+*/
+void CopyFloat2Byte(float *ImgSrc, int StrideF, byte *ImgDst, int StrideB,
+                    ROI Size) {
+  for (int i = 0; i < Size.height; i++) {
+    for (int j = 0; j < Size.width; j++) {
+      ImgDst[i * StrideB + j] =
+          (byte)clamp_0_255((int)(round_f(ImgSrc[i * StrideF + j])));
+    }
+  }
+}
+
+/**
+**************************************************************************
+*  Memory deallocator, deletes aligned format frame.
+*
+* \param ptr            [IN] - Pointer to the plane
+*
+* \return None
+*/
+void FreePlane(void *ptr) {
+  //#ifdef __ALLOW_ALIGNED_MEMORY_MANAGEMENT
+  //  if (ptr)
+  //  {
+  //      _aligned_free(ptr);
+  //  }
+  //#else
+  if (ptr) {
+    free(ptr);
+  }
+
+  //#endif
+}
+
+/**
+**************************************************************************
+*  Performs addition of given value to each pixel in the plane
+*
+* \param Value              [IN] - Value to add
+* \param ImgSrcDst          [IN/OUT] - Source float plane
+* \param StrideF            [IN] - Source plane stride
+* \param Size               [IN] - Size of area to copy
+*
+* \return None
+*/
+void AddFloatPlane(float Value, float *ImgSrcDst, int StrideF, ROI Size) {
+  for (int i = 0; i < Size.height; i++) {
+    for (int j = 0; j < Size.width; j++) {
+      ImgSrcDst[i * StrideF + j] += Value;
+    }
+  }
+}
+
+/**
+**************************************************************************
+*  Performs multiplication of given value with each pixel in the plane
+*
+* \param Value              [IN] - Value for multiplication
+* \param ImgSrcDst          [IN/OUT] - Source float plane
+* \param StrideF            [IN] - Source plane stride
+* \param Size               [IN] - Size of area to copy
+*
+* \return None
+*/
+void MulFloatPlane(float Value, float *ImgSrcDst, int StrideF, ROI Size) {
+  for (int i = 0; i < Size.height; i++) {
+    for (int j = 0; j < Size.width; j++) {
+      ImgSrcDst[i * StrideF + j] *= Value;
+    }
+  }
+}
+
+/**
+**************************************************************************
+*  This function performs acquisition of image dimensions
+*
+* \param FileName       [IN] - Image name to load
+* \param Width          [OUT] - Image width from file header
+* \param Height         [OUT] - Image height from file header
+*
+* \return Status code
+*/
+int PreLoadBmp(char *FileName, int *Width, int *Height) {
+  BMPFileHeader FileHeader;
+  BMPInfoHeader InfoHeader;
+  FILE *fh;
+
+  if (!(fh = fopen(FileName, "rb"))) {
+    return 1;  // invalid filename
+  }
+
+  fread(&FileHeader, sizeof(BMPFileHeader), 1, fh);
+
+  if (FileHeader._bm_signature != 0x4D42) {
+    return 2;  // invalid file format
+  }
+
+  fread(&InfoHeader, sizeof(BMPInfoHeader), 1, fh);
+
+  if (InfoHeader._bm_color_depth != 24) {
+    return 3;  // invalid color depth
+  }
+
+  if (InfoHeader._bm_compressed) {
+    return 4;  // invalid compression property
+  }
+
+  *Width = InfoHeader._bm_image_width;
+  *Height = InfoHeader._bm_image_height;
+
+  fclose(fh);
+  return 0;
+}
+
+/**
+**************************************************************************
+*  This function performs loading of bitmap luma
+*
+* \param FileName       [IN] - Image name to load
+* \param Stride         [IN] - Image stride
+* \param ImSize         [IN] - Image size
+* \param Img            [OUT] - Prepared buffer
+*
+* \return None
+*/
+void LoadBmpAsGray(char *FileName, int Stride, ROI ImSize, byte *Img) {
+  BMPFileHeader FileHeader;
+  BMPInfoHeader InfoHeader;
+  FILE *fh;
+  fh = fopen(FileName, "rb");
+
+  fread(&FileHeader, sizeof(BMPFileHeader), 1, fh);
+  fread(&InfoHeader, sizeof(BMPInfoHeader), 1, fh);
+
+  for (int i = ImSize.height - 1; i >= 0; i--) {
+    for (int j = 0; j < ImSize.width; j++) {
+      int r = 0, g = 0, b = 0;
+      fread(&b, 1, 1, fh);
+      fread(&g, 1, 1, fh);
+      fread(&r, 1, 1, fh);
+      int val = (313524 * r + 615514 * g + 119537 * b + 524288) >> 20;
+      Img[i * Stride + j] = (byte)clamp_0_255(val);
+    }
+  }
+
+  fclose(fh);
+  return;
+}
+
+/**
+**************************************************************************
+*  This function performs dumping of bitmap luma on HDD
+*
+* \param FileName       [OUT] - Image name to dump to
+* \param Img            [IN] - Image luma to dump
+* \param Stride         [IN] - Image stride
+* \param ImSize         [IN] - Image size
+*
+* \return None
+*/
+void DumpBmpAsGray(char *FileName, byte *Img, int Stride, ROI ImSize) {
+  FILE *fp = NULL;
+  fp = fopen(FileName, "wb");
+
+  if (fp == NULL) {
+    return;
+  }
+
+  BMPFileHeader FileHeader;
+  BMPInfoHeader InfoHeader;
+
+  // init headers
+  FileHeader._bm_signature = 0x4D42;
+  FileHeader._bm_file_size = 54 + 3 * ImSize.width * ImSize.height;
+  FileHeader._bm_reserved = 0;
+  FileHeader._bm_bitmap_data = 0x36;
+  InfoHeader._bm_bitmap_size = 0;
+  InfoHeader._bm_color_depth = 24;
+  InfoHeader._bm_compressed = 0;
+  InfoHeader._bm_hor_resolution = 0;
+  InfoHeader._bm_image_height = ImSize.height;
+  InfoHeader._bm_image_width = ImSize.width;
+  InfoHeader._bm_info_header_size = 40;
+  InfoHeader._bm_num_colors_used = 0;
+  InfoHeader._bm_num_important_colors = 0;
+  InfoHeader._bm_num_of_planes = 1;
+  InfoHeader._bm_ver_resolution = 0;
+
+  fwrite(&FileHeader, sizeof(BMPFileHeader), 1, fp);
+  fwrite(&InfoHeader, sizeof(BMPInfoHeader), 1, fp);
+
+  for (int i = ImSize.height - 1; i >= 0; i--) {
+    for (int j = 0; j < ImSize.width; j++) {
+      fwrite(&(Img[i * Stride + j]), 1, 1, fp);
+      fwrite(&(Img[i * Stride + j]), 1, 1, fp);
+      fwrite(&(Img[i * Stride + j]), 1, 1, fp);
+    }
+  }
+
+  fclose(fp);
+}
+
+/**
+**************************************************************************
+*  This function performs dumping of 8x8 block from float plane
+*
+* \param PlaneF         [IN] - Image plane
+* \param StrideF        [IN] - Image stride
+* \param Fname          [OUT] - File name to dump to
+*
+* \return None
+*/
+void DumpBlockF(float *PlaneF, int StrideF, char *Fname) {
+  FILE *fp = fopen(Fname, "wb");
+
+  for (int i = 0; i < 8; i++) {
+    for (int j = 0; j < 8; j++) {
+      fprintf(fp, "%.*f  ", 14, PlaneF[i * StrideF + j]);
+    }
+
+    fprintf(fp, "\n");
+  }
+
+  fclose(fp);
+}
+
+/**
+**************************************************************************
+*  This function performs dumping of 8x8 block from byte plane
+*
+* \param Plane          [IN] - Image plane
+* \param Stride         [IN] - Image stride
+* \param Fname          [OUT] - File name to dump to
+*
+* \return None
+*/
+void DumpBlock(byte *Plane, int Stride, char *Fname) {
+  FILE *fp = fopen(Fname, "wb");
+
+  for (int i = 0; i < 8; i++) {
+    for (int j = 0; j < 8; j++) {
+      fprintf(fp, "%.3d  ", Plane[i * Stride + j]);
+    }
+
+    fprintf(fp, "\n");
+  }
+
+  fclose(fp);
+}
+
+/**
+**************************************************************************
+*  This function performs evaluation of Mean Square Error between two images
+*
+* \param Img1           [IN] - Image 1
+* \param Img2           [IN] - Image 2
+* \param Stride         [IN] - Image stride
+* \param Size           [IN] - Image size
+*
+* \return Mean Square Error between images
+*/
+float CalculateMSE(byte *Img1, byte *Img2, int Stride, ROI Size) {
+  uint32 Acc = 0;
+
+  for (int i = 0; i < Size.height; i++) {
+    for (int j = 0; j < Size.width; j++) {
+      int TmpDiff = Img1[i * Stride + j] - Img2[i * Stride + j];
+      TmpDiff *= TmpDiff;
+      Acc += TmpDiff;
+    }
+  }
+
+  return ((float)Acc) / (Size.height * Size.width);
+}
+
+/**
+**************************************************************************
+*  This function performs evaluation of Peak Signal to Noise Ratio between
+*  two images
+*
+* \param Img1           [IN] - Image 1
+* \param Img2           [IN] - Image 2
+* \param Stride         [IN] - Image stride
+* \param Size           [IN] - Image size
+*
+* \return Peak Signal to Noise Ratio between images
+*/
+float CalculatePSNR(byte *Img1, byte *Img2, int Stride, ROI Size) {
+  float MSE = CalculateMSE(Img1, Img2, Stride, Size);
+  return 10 * log10(255 * 255 / MSE);
+}

Samples/2_Concepts_and_Techniques/dct8x8/BmpUtil.h

@@ -0,0 +1,125 @@
+/* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *  * Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  * Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *  * Neither the name of NVIDIA CORPORATION nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+**************************************************************************
+* \file BmpUtil.h
+* \brief Contains basic image operations declaration.
+*
+* This file contains declaration of basic bitmap loading, saving,
+* conversions to different representations and memory management routines.
+*/
+
+#pragma once
+
+#if defined(WIN32) || defined(_WIN32) || defined(WIN64) || defined(_WIN64)
+#pragma pack(push)
+#endif
+
+#pragma pack(1)
+
+typedef char int8;
+typedef short int16;
+typedef int int32;
+typedef unsigned char uint8;
+typedef unsigned short uint16;
+typedef unsigned int uint32;
+
+/**
+* \brief Bitmap file header structure
+*
+*  Bitmap file header structure
+*/
+typedef struct {
+  uint16 _bm_signature;    //!< File signature, must be "BM"
+  uint32 _bm_file_size;    //!< File size
+  uint32 _bm_reserved;     //!< Reserved, must be zero
+  uint32 _bm_bitmap_data;  //!< Bitmap data
+} BMPFileHeader;
+
+/**
+* \brief Bitmap info header structure
+*
+*  Bitmap info header structure
+*/
+typedef struct {
+  uint32 _bm_info_header_size;      //!< Info header size, must be 40
+  uint32 _bm_image_width;           //!< Image width
+  uint32 _bm_image_height;          //!< Image height
+  uint16 _bm_num_of_planes;         //!< Amount of image planes, must be 1
+  uint16 _bm_color_depth;           //!< Color depth
+  uint32 _bm_compressed;            //!< Image compression, must be none
+  uint32 _bm_bitmap_size;           //!< Size of bitmap data
+  uint32 _bm_hor_resolution;        //!< Horizontal resolution, assumed to be 0
+  uint32 _bm_ver_resolution;        //!< Vertical resolution, assumed to be 0
+  uint32 _bm_num_colors_used;       //!< Number of colors used, assumed to be 0
+  uint32 _bm_num_important_colors;  //!< Number of important colors, assumed to
+                                    //!be 0
+} BMPInfoHeader;
+
+#if defined(WIN32) || defined(_WIN32) || defined(WIN64) || defined(_WIN64)
+#pragma pack(pop)
+#else
+#pragma pack()
+#endif
+
+/**
+* \brief Simple 2D size / region_of_interest structure
+*
+*  Simple 2D size / region_of_interest structure
+*/
+typedef struct {
+  int width;   //!< ROI width
+  int height;  //!< ROI height
+} ROI;
+
+/**
+*  One-byte unsigned integer type
+*/
+typedef unsigned char byte;
+
+extern "C" {
+int clamp_0_255(int x);
+float round_f(float num);
+byte *MallocPlaneByte(int width, int height, int *pStepBytes);
+short *MallocPlaneShort(int width, int height, int *pStepBytes);
+float *MallocPlaneFloat(int width, int height, int *pStepBytes);
+void CopyByte2Float(byte *ImgSrc, int StrideB, float *ImgDst, int StrideF,
+                    ROI Size);
+void CopyFloat2Byte(float *ImgSrc, int StrideF, byte *ImgDst, int StrideB,
+                    ROI Size);
+void FreePlane(void *ptr);
+void AddFloatPlane(float Value, float *ImgSrcDst, int StrideF, ROI Size);
+void MulFloatPlane(float Value, float *ImgSrcDst, int StrideF, ROI Size);
+int PreLoadBmp(char *FileName, int *Width, int *Height);
+void LoadBmpAsGray(char *FileName, int Stride, ROI ImSize, byte *Img);
+void DumpBmpAsGray(char *FileName, byte *Img, int Stride, ROI ImSize);
+void DumpBlockF(float *PlaneF, int StrideF, char *Fname);
+void DumpBlock(byte *Plane, int Stride, char *Fname);
+float CalculateMSE(byte *Img1, byte *Img2, int Stride, ROI Size);
+float CalculatePSNR(byte *Img1, byte *Img2, int Stride, ROI Size);
+}

Samples/2_Concepts_and_Techniques/dct8x8/Common.h

@@ -0,0 +1,88 @@
+/* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *  * Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  * Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *  * Neither the name of NVIDIA CORPORATION nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+**************************************************************************
+* \file Common.h
+* \brief Common includes header.
+*
+* This file contains includes of all libraries used by the project.
+*/
+
+#pragma once
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <math.h>
+
+#include <cuda_runtime.h>
+#include <helper_cuda.h>  // helper functions for CUDA timing and initialization
+#include <helper_functions.h>  // helper functions for timing, string parsing
+
+/**
+*  The dimension of pixels block
+*/
+#define BLOCK_SIZE 8
+
+/**
+*  Square of dimension of pixels block
+*/
+#define BLOCK_SIZE2 64
+
+/**
+*  log_2{BLOCK_SIZE), used for quick multiplication or division by the
+*  pixels block dimension via shifting
+*/
+#define BLOCK_SIZE_LOG2 3
+
+/**
+*  log_2{BLOCK_SIZE*BLOCK_SIZE), used for quick multiplication or division by
+* the
+*  square of pixels block via shifting
+*/
+#define BLOCK_SIZE2_LOG2 6
+
+/**
+*  This macro states that __mul24 operation is performed faster that traditional
+*  multiplication for two integers on CUDA. Please undefine if it appears to be
+*  wrong on your system
+*/
+#define __MUL24_FASTER_THAN_ASTERIX
+
+/**
+*  Wrapper to the fastest integer multiplication function on CUDA
+*/
+#ifdef __MUL24_FASTER_THAN_ASTERIX
+#define FMUL(x, y) (__mul24(x, y))
+#else
+#define FMUL(x, y) ((x) * (y))
+#endif
+
+/**
+*  This macro allows using aligned memory management
+*/
+//#define __ALLOW_ALIGNED_MEMORY_MANAGEMENT

Samples/2_Concepts_and_Techniques/dct8x8/DCT8x8_Gold.cpp

@@ -0,0 +1,403 @@
+/* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *  * Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  * Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *  * Neither the name of NVIDIA CORPORATION nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+**************************************************************************
+* \file DCT8x8_Gold.cpp
+* \brief Contains DCT, IDCT and quantization routines, used in JPEG internal
+* data processing. Host code.
+*
+* This sample implements forward and inverse Discrete Cosine Transform to blocks
+* of image pixels (of 8x8 size), as in JPEG standard. The data processing is
+*done
+* using floating point representation.
+* The routine that performs quantization of coefficients is also included.
+*/
+
+#include "Common.h"
+#include "BmpUtil.h"
+
+/**
+*  This unitary matrix performs DCT of rows of the matrix to the left
+*/
+const float DCTv8matrix[BLOCK_SIZE2] = {
+  0.3535533905932738f,  0.4903926402016152f,  0.4619397662556434f,  0.4157348061512726f,  0.3535533905932738f,  0.2777851165098011f,  0.1913417161825449f,  0.0975451610080642f,
+  0.3535533905932738f,  0.4157348061512726f,  0.1913417161825449f, -0.0975451610080641f, -0.3535533905932737f, -0.4903926402016152f, -0.4619397662556434f, -0.2777851165098011f,
+  0.3535533905932738f,  0.2777851165098011f, -0.1913417161825449f, -0.4903926402016152f, -0.3535533905932738f,  0.0975451610080642f,  0.4619397662556433f,  0.4157348061512727f,
+  0.3535533905932738f,  0.0975451610080642f, -0.4619397662556434f, -0.2777851165098011f,  0.3535533905932737f,  0.4157348061512727f, -0.1913417161825450f, -0.4903926402016153f,
+  0.3535533905932738f, -0.0975451610080641f, -0.4619397662556434f,  0.2777851165098009f,  0.3535533905932738f, -0.4157348061512726f, -0.1913417161825453f,  0.4903926402016152f,
+  0.3535533905932738f, -0.2777851165098010f, -0.1913417161825452f,  0.4903926402016153f, -0.3535533905932733f, -0.0975451610080649f,  0.4619397662556437f, -0.4157348061512720f,
+  0.3535533905932738f, -0.4157348061512727f,  0.1913417161825450f,  0.0975451610080640f, -0.3535533905932736f,  0.4903926402016152f, -0.4619397662556435f,  0.2777851165098022f,
+  0.3535533905932738f, -0.4903926402016152f,  0.4619397662556433f, -0.4157348061512721f,  0.3535533905932733f, -0.2777851165098008f,  0.1913417161825431f, -0.0975451610080625f
+};
+
+/**
+*  This unitary matrix performs DCT of columns of the matrix to the right
+*/
+const float DCTv8matrixT[BLOCK_SIZE2] = {
+  0.3535533905932738f,  0.3535533905932738f,  0.3535533905932738f,  0.3535533905932738f,  0.3535533905932738f,  0.3535533905932738f,  0.3535533905932738f,  0.3535533905932738f,
+  0.4903926402016152f,  0.4157348061512726f,  0.2777851165098011f,  0.0975451610080642f, -0.0975451610080641f, -0.2777851165098010f, -0.4157348061512727f, -0.4903926402016152f,
+  0.4619397662556434f,  0.1913417161825449f, -0.1913417161825449f, -0.4619397662556434f, -0.4619397662556434f, -0.1913417161825452f,  0.1913417161825450f,  0.4619397662556433f,
+  0.4157348061512726f, -0.0975451610080641f, -0.4903926402016152f, -0.2777851165098011f,  0.2777851165098009f,  0.4903926402016153f,  0.0975451610080640f, -0.4157348061512721f,
+  0.3535533905932738f, -0.3535533905932737f, -0.3535533905932738f,  0.3535533905932737f,  0.3535533905932738f, -0.3535533905932733f, -0.3535533905932736f,  0.3535533905932733f,
+  0.2777851165098011f, -0.4903926402016152f,  0.0975451610080642f,  0.4157348061512727f, -0.4157348061512726f, -0.0975451610080649f,  0.4903926402016152f, -0.2777851165098008f,
+  0.1913417161825449f, -0.4619397662556434f,  0.4619397662556433f, -0.1913417161825450f, -0.1913417161825453f,  0.4619397662556437f, -0.4619397662556435f,  0.1913417161825431f,
+  0.0975451610080642f, -0.2777851165098011f,  0.4157348061512727f, -0.4903926402016153f,  0.4903926402016152f, -0.4157348061512720f,  0.2777851165098022f, -0.0975451610080625f
+};
+
+/**
+*  JPEG quality=0_of_12 quantization matrix
+*/
+float Q[BLOCK_SIZE2] = {
+  32.f,  33.f,  51.f,  81.f,  66.f,  39.f,  34.f,  17.f,
+  33.f,  36.f,  48.f,  47.f,  28.f,  23.f,  12.f,  12.f,
+  51.f,  48.f,  47.f,  28.f,  23.f,  12.f,  12.f,  12.f,
+  81.f,  47.f,  28.f,  23.f,  12.f,  12.f,  12.f,  12.f,
+  66.f,  28.f,  23.f,  12.f,  12.f,  12.f,  12.f,  12.f,
+  39.f,  23.f,  12.f,  12.f,  12.f,  12.f,  12.f,  12.f,
+  34.f,  12.f,  12.f,  12.f,  12.f,  12.f,  12.f,  12.f,
+  17.f,  12.f,  12.f,  12.f,  12.f,  12.f,  12.f,  12.f
+};
+
+/**
+**************************************************************************
+*  Performs multiplication of two 8x8 matrices
+*
+* \param M1             [IN] - Pointer to the first matrix
+* \param M1Stride       [IN] - Stride of the first matrix
+* \param M2             [IN] - Pointer to the second matrix
+* \param M2Stride       [IN] - Stride of the second matrix
+* \param Mres           [OUT] - Pointer to the result matrix
+* \param MresStride     [IN] - Stride of the result matrix
+*
+* \return None
+*/
+void mult8x8(const float *M1, int M1Stride, const float *M2, int M2Stride,
+             float *Mres, int MresStride) {
+  for (int i = 0; i < BLOCK_SIZE; i++) {
+    for (int j = 0; j < BLOCK_SIZE; j++) {
+      float accumul = 0;
+
+      for (int k = 0; k < BLOCK_SIZE; k++) {
+        accumul += M1[i * M1Stride + k] * M2[k * M2Stride + j];
+      }
+
+      Mres[i * MresStride + j] = accumul;
+    }
+  }
+}
+
+/**
+**************************************************************************
+*  Performs 8x8 block-wise Forward Discrete Cosine Transform of the given
+*  image plane and outputs result to the plane of coefficients.
+*  1st version.
+*
+* \param fSrc       [IN] - Source image plane
+* \param fDst       [OUT] - Destination coefficients plane
+* \param Stride     [IN] - Stride of both planes
+* \param Size       [IN] - Size of planes
+*
+* \return None
+*/
+extern "C" void computeDCT8x8Gold1(const float *fSrc, float *fDst, int Stride,
+                                   ROI Size) {
+  float tmpblock[BLOCK_SIZE2];
+
+  // perform block wise DCT
+  // DCT(A) = DCTv8matrixT * A * DCTv8matrix
+  for (int i = 0; i + BLOCK_SIZE - 1 < Size.height; i += BLOCK_SIZE) {
+    for (int j = 0; j + BLOCK_SIZE - 1 < Size.width; j += BLOCK_SIZE) {
+      // tmpblock = DCTv8matrixT * A
+      mult8x8(DCTv8matrixT, BLOCK_SIZE, fSrc + i * Stride + j, Stride, tmpblock,
+              BLOCK_SIZE);
+      // DCT(A) = tmpblock * DCTv8matrix
+      mult8x8(tmpblock, BLOCK_SIZE, DCTv8matrix, BLOCK_SIZE,
+              fDst + i * Stride + j, Stride);
+    }
+  }
+}
+
+/**
+**************************************************************************
+*  Performs 8x8 block-wise Inverse Discrete Cosine Transform of the given
+*  coefficients plane and outputs result to the image plane.
+*  1st version.
+*
+* \param fSrc       [IN] - Source coefficients plane
+* \param fDst       [OUT] - Destination image plane
+* \param Stride     [IN] - Stride of both planes
+* \param Size       [IN] - Size of planes
+*
+* \return None
+*/
+extern "C" void computeIDCT8x8Gold1(const float *fSrc, float *fDst, int Stride,
+                                    ROI Size) {
+  float tmpblock[BLOCK_SIZE2];
+
+  // perform block wise IDCT
+  // IDCT(A) = DCTv8matrix * A * DCTv8matrixT
+  for (int i = 0; i + BLOCK_SIZE - 1 < Size.height; i += BLOCK_SIZE) {
+    for (int j = 0; j + BLOCK_SIZE - 1 < Size.width; j += BLOCK_SIZE) {
+      // tmpblock = DCTv8matrix * A
+      mult8x8(DCTv8matrix, BLOCK_SIZE, fSrc + i * Stride + j, Stride, tmpblock,
+              BLOCK_SIZE);
+      // DCT(A) = tmpblock * DCTv8matrixT;
+      mult8x8(tmpblock, BLOCK_SIZE, DCTv8matrixT, BLOCK_SIZE,
+              fDst + i * Stride + j, Stride);
+    }
+  }
+}
+
+/**
+**************************************************************************
+*  Performs in-place quantization of given coefficients plane using
+*  predefined quantization matrices (float elements)
+*
+* \param fSrcDst        [IN/OUT] - Coefficients plane
+* \param Stride         [IN] - Stride of SrcDst
+* \param Size           [IN] - Size of the plane
+*
+* \return None
+*/
+extern "C" void quantizeGoldFloat(float *fSrcDst, int Stride, ROI Size) {
+  // perform block wise in-place quantization using Q
+  // Q(A) = round(A ./ Q) .* Q;
+  for (int i = 0; i < Size.height; i++) {
+    for (int j = 0; j < Size.width; j++) {
+      int qx = j % BLOCK_SIZE;
+      int qy = i % BLOCK_SIZE;
+      float quantized =
+          round_f(fSrcDst[i * Stride + j] / Q[(qy << BLOCK_SIZE_LOG2) + qx]);
+      fSrcDst[i * Stride + j] = quantized * Q[(qy << BLOCK_SIZE_LOG2) + qx];
+    }
+  }
+}
+
+/**
+**************************************************************************
+*  Performs in-place quantization of given coefficients plane using
+*  predefined quantization matrices (short elements)
+*
+* \param fSrcDst        [IN/OUT] - Coefficients plane
+* \param Stride         [IN] - Stride of SrcDst
+* \param Size           [IN] - Size of the plane
+*
+* \return None
+*/
+void quantizeGoldShort(short *fSrcDst, int Stride, ROI Size) {
+  // perform block wise in-place quantization using Q
+  // Q(A) = round(A ./ Q) .* Q;
+  for (int i = 0; i < Size.height; i++) {
+    for (int j = 0; j < Size.width; j++) {
+      int qx = j % BLOCK_SIZE;
+      int qy = i % BLOCK_SIZE;
+      short temp = fSrcDst[i * Stride + j];
+      short quant = (short)(Q[(qy << BLOCK_SIZE_LOG2) + qx]);
+
+      if (temp < 0) {
+        temp = -temp;
+        temp += quant >> 1;
+        temp /= quant;
+        temp = -temp;
+      } else {
+        temp += quant >> 1;
+        temp /= quant;
+      }
+
+      fSrcDst[i * Stride + j] = temp * quant;
+    }
+  }
+}
+
+// Used in forward and inverse DCT.
+float C_a = 1.387039845322148f;  //!< a = (2^0.5) * cos(    pi / 16);
+float C_b = 1.306562964876377f;  //!< b = (2^0.5) * cos(    pi /  8);
+float C_c = 1.175875602419359f;  //!< c = (2^0.5) * cos(3 * pi / 16);
+float C_d = 0.785694958387102f;  //!< d = (2^0.5) * cos(5 * pi / 16);
+float C_e = 0.541196100146197f;  //!< e = (2^0.5) * cos(3 * pi /  8);
+float C_f = 0.275899379282943f;  //!< f = (2^0.5) * cos(7 * pi / 16);
+
+/**
+*  Normalization constant that is used in forward and inverse DCT
+*/
+float C_norm = 0.3535533905932737f;  // 1 / (8^0.5)
+
+/**
+**************************************************************************
+*  Performs DCT of vector of 8 elements.
+*
+* \param FirstIn        [IN] - Pointer to the first element of input vector
+* \param StepIn         [IN] - Value to add to ptr to access other input
+*elements
+* \param FirstOut       [OUT] - Pointer to the first element of output vector
+* \param StepOut        [IN] - Value to add to ptr to access other output
+*elements
+*
+* \return None
+*/
+void SubroutineDCTvector(float *FirstIn, int StepIn, float *FirstOut,
+                         int StepOut) {
+  float X07P = FirstIn[0 * StepIn] + FirstIn[7 * StepIn];
+  float X16P = FirstIn[1 * StepIn] + FirstIn[6 * StepIn];
+  float X25P = FirstIn[2 * StepIn] + FirstIn[5 * StepIn];
+  float X34P = FirstIn[3 * StepIn] + FirstIn[4 * StepIn];
+
+  float X07M = FirstIn[0 * StepIn] - FirstIn[7 * StepIn];
+  float X61M = FirstIn[6 * StepIn] - FirstIn[1 * StepIn];
+  float X25M = FirstIn[2 * StepIn] - FirstIn[5 * StepIn];
+  float X43M = FirstIn[4 * StepIn] - FirstIn[3 * StepIn];
+
+  float X07P34PP = X07P + X34P;
+  float X07P34PM = X07P - X34P;
+  float X16P25PP = X16P + X25P;
+  float X16P25PM = X16P - X25P;
+
+  FirstOut[0 * StepOut] = C_norm * (X07P34PP + X16P25PP);
+  FirstOut[2 * StepOut] = C_norm * (C_b * X07P34PM + C_e * X16P25PM);
+  FirstOut[4 * StepOut] = C_norm * (X07P34PP - X16P25PP);
+  FirstOut[6 * StepOut] = C_norm * (C_e * X07P34PM - C_b * X16P25PM);
+
+  FirstOut[1 * StepOut] =
+      C_norm * (C_a * X07M - C_c * X61M + C_d * X25M - C_f * X43M);
+  FirstOut[3 * StepOut] =
+      C_norm * (C_c * X07M + C_f * X61M - C_a * X25M + C_d * X43M);
+  FirstOut[5 * StepOut] =
+      C_norm * (C_d * X07M + C_a * X61M + C_f * X25M - C_c * X43M);
+  FirstOut[7 * StepOut] =
+      C_norm * (C_f * X07M + C_d * X61M + C_c * X25M + C_a * X43M);
+}
+
+/**
+**************************************************************************
+*  Performs IDCT of vector of 8 elements.
+*
+* \param FirstIn        [IN] - Pointer to the first element of input vector
+* \param StepIn         [IN] - Value to add to ptr to access other input
+*elements
+* \param FirstOut       [OUT] - Pointer to the first element of output vector
+* \param StepOut        [IN] - Value to add to ptr to access other output
+*elements
+*
+* \return None
+*/
+void SubroutineIDCTvector(float *FirstIn, int StepIn, float *FirstOut,
+                          int StepOut) {
+  float Y04P = FirstIn[0 * StepIn] + FirstIn[4 * StepIn];
+  float Y2b6eP = C_b * FirstIn[2 * StepIn] + C_e * FirstIn[6 * StepIn];
+
+  float Y04P2b6ePP = Y04P + Y2b6eP;
+  float Y04P2b6ePM = Y04P - Y2b6eP;
+  float Y7f1aP3c5dPP = C_f * FirstIn[7 * StepIn] + C_a * FirstIn[1 * StepIn] +
+                       C_c * FirstIn[3 * StepIn] + C_d * FirstIn[5 * StepIn];
+  float Y7a1fM3d5cMP = C_a * FirstIn[7 * StepIn] - C_f * FirstIn[1 * StepIn] +
+                       C_d * FirstIn[3 * StepIn] - C_c * FirstIn[5 * StepIn];
+
+  float Y04M = FirstIn[0 * StepIn] - FirstIn[4 * StepIn];
+  float Y2e6bM = C_e * FirstIn[2 * StepIn] - C_b * FirstIn[6 * StepIn];
+
+  float Y04M2e6bMP = Y04M + Y2e6bM;
+  float Y04M2e6bMM = Y04M - Y2e6bM;
+  float Y1c7dM3f5aPM = C_c * FirstIn[1 * StepIn] - C_d * FirstIn[7 * StepIn] -
+                       C_f * FirstIn[3 * StepIn] - C_a * FirstIn[5 * StepIn];
+  float Y1d7cP3a5fMM = C_d * FirstIn[1 * StepIn] + C_c * FirstIn[7 * StepIn] -
+                       C_a * FirstIn[3 * StepIn] + C_f * FirstIn[5 * StepIn];
+
+  FirstOut[0 * StepOut] = C_norm * (Y04P2b6ePP + Y7f1aP3c5dPP);
+  FirstOut[7 * StepOut] = C_norm * (Y04P2b6ePP - Y7f1aP3c5dPP);
+  FirstOut[4 * StepOut] = C_norm * (Y04P2b6ePM + Y7a1fM3d5cMP);
+  FirstOut[3 * StepOut] = C_norm * (Y04P2b6ePM - Y7a1fM3d5cMP);
+
+  FirstOut[1 * StepOut] = C_norm * (Y04M2e6bMP + Y1c7dM3f5aPM);
+  FirstOut[5 * StepOut] = C_norm * (Y04M2e6bMM - Y1d7cP3a5fMM);
+  FirstOut[2 * StepOut] = C_norm * (Y04M2e6bMM + Y1d7cP3a5fMM);
+  FirstOut[6 * StepOut] = C_norm * (Y04M2e6bMP - Y1c7dM3f5aPM);
+}
+
+/**
+**************************************************************************
+*  Performs 8x8 block-wise Forward Discrete Cosine Transform of the given
+*  image plane and outputs result to the plane of coefficients.
+*  2nd version.
+*
+* \param fSrc       [IN] - Source image plane
+* \param fDst       [OUT] - Destination coefficients plane
+* \param Stride     [IN] - Stride of both planes
+* \param Size       [IN] - Size of planes
+*
+* \return None
+*/
+extern "C" void computeDCT8x8Gold2(const float *fSrc, float *fDst, int Stride,
+                                   ROI Size) {
+  for (int i = 0; i + BLOCK_SIZE - 1 < Size.height; i += BLOCK_SIZE) {
+    for (int j = 0; j + BLOCK_SIZE - 1 < Size.width; j += BLOCK_SIZE) {
+      // process rows
+      for (int k = 0; k < BLOCK_SIZE; k++) {
+        SubroutineDCTvector((float *)fSrc + (i + k) * Stride + j, 1,
+                            fDst + (i + k) * Stride + j, 1);
+      }
+
+      // process columns
+      for (int k = 0; k < BLOCK_SIZE; k++) {
+        SubroutineDCTvector(fDst + i * Stride + (j + k), Stride,
+                            fDst + i * Stride + (j + k), Stride);
+      }
+    }
+  }
+}
+
+/**
+**************************************************************************
+*  Performs 8x8 block-wise Inverse Discrete Cosine Transform of the given
+*  coefficients plane and outputs result to the image plane
+*  2nd version.
+*
+* \param fSrc       [IN] - Source coefficients plane
+* \param fDst       [OUT] - Destination image plane
+* \param Stride     [IN] - Stride of both planes
+* \param Size       [IN] - Size of planes
+*
+* \return None
+*/
+extern "C" void computeIDCT8x8Gold2(const float *fSrc, float *fDst, int Stride,
+                                    ROI Size) {
+  for (int i = 0; i + BLOCK_SIZE - 1 < Size.height; i += BLOCK_SIZE) {
+    for (int j = 0; j + BLOCK_SIZE - 1 < Size.width; j += BLOCK_SIZE) {
+      // process rows
+      for (int k = 0; k < BLOCK_SIZE; k++) {
+        SubroutineIDCTvector((float *)fSrc + (i + k) * Stride + j, 1,
+                             fDst + (i + k) * Stride + j, 1);
+      }
+
+      // process columns
+      for (int k = 0; k < BLOCK_SIZE; k++) {
+        SubroutineIDCTvector(fDst + i * Stride + (j + k), Stride,
+                             fDst + i * Stride + (j + k), Stride);
+      }
+    }
+  }
+}

Samples/2_Concepts_and_Techniques/dct8x8/DCT8x8_Gold.h

@@ -0,0 +1,49 @@
+/* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *  * Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  * Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *  * Neither the name of NVIDIA CORPORATION nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+**************************************************************************
+* \file DCT8x8_Gold.h
+* \brief Contains declaration of CPU versions of DCT, IDCT and quantization
+* routines.
+*
+* Contains declaration of CPU versions of DCT, IDCT and quantization
+* routines.
+*/
+
+#pragma once
+
+#include "BmpUtil.h"
+
+extern "C" {
+void computeDCT8x8Gold1(const float *fSrc, float *fDst, int Stride, ROI Size);
+void computeIDCT8x8Gold1(const float *fSrc, float *fDst, int Stride, ROI Size);
+void quantizeGoldFloat(float *fSrcDst, int Stride, ROI Size);
+void quantizeGoldShort(short *fSrcDst, int Stride, ROI Size);
+void computeDCT8x8Gold2(const float *fSrc, float *fDst, int Stride, ROI Size);
+void computeIDCT8x8Gold2(const float *fSrc, float *fDst, int Stride, ROI Size);
+}

Samples/2_Concepts_and_Techniques/dct8x8/Makefile

@@ -0,0 +1,346 @@
+################################################################################
+# Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#  * Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+#  * Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in the
+#    documentation and/or other materials provided with the distribution.
+#  * Neither the name of NVIDIA CORPORATION nor the names of its
+#    contributors may be used to endorse or promote products derived
+#    from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS ``AS IS'' AND ANY
+# EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+# PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+# CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+# EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+# PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+# PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+# OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+################################################################################
+#
+# Makefile project only supported on Mac OS X and Linux Platforms)
+#
+################################################################################
+
+# Location of the CUDA Toolkit
+CUDA_PATH ?= /usr/local/cuda
+
+##############################
+# start deprecated interface #
+##############################
+ifeq ($(x86_64),1)
+    $(info WARNING - x86_64 variable has been deprecated)
+    $(info WARNING - please use TARGET_ARCH=x86_64 instead)
+    TARGET_ARCH ?= x86_64
+endif
+ifeq ($(ARMv7),1)
+    $(info WARNING - ARMv7 variable has been deprecated)
+    $(info WARNING - please use TARGET_ARCH=armv7l instead)
+    TARGET_ARCH ?= armv7l
+endif
+ifeq ($(aarch64),1)
+    $(info WARNING - aarch64 variable has been deprecated)
+    $(info WARNING - please use TARGET_ARCH=aarch64 instead)
+    TARGET_ARCH ?= aarch64
+endif
+ifeq ($(ppc64le),1)
+    $(info WARNING - ppc64le variable has been deprecated)
+    $(info WARNING - please use TARGET_ARCH=ppc64le instead)
+    TARGET_ARCH ?= ppc64le
+endif
+ifneq ($(GCC),)
+    $(info WARNING - GCC variable has been deprecated)
+    $(info WARNING - please use HOST_COMPILER=$(GCC) instead)
+    HOST_COMPILER ?= $(GCC)
+endif
+ifneq ($(abi),)
+    $(error ERROR - abi variable has been removed)
+endif
+############################
+# end deprecated interface #
+############################
+
+# architecture
+HOST_ARCH   := $(shell uname -m)
+TARGET_ARCH ?= $(HOST_ARCH)
+ifneq (,$(filter $(TARGET_ARCH),x86_64 aarch64 sbsa ppc64le armv7l))
+    ifneq ($(TARGET_ARCH),$(HOST_ARCH))
+        ifneq (,$(filter $(TARGET_ARCH),x86_64 aarch64 sbsa ppc64le))
+            TARGET_SIZE := 64
+        else ifneq (,$(filter $(TARGET_ARCH),armv7l))
+            TARGET_SIZE := 32
+        endif
+    else
+        TARGET_SIZE := $(shell getconf LONG_BIT)
+    endif
+else
+    $(error ERROR - unsupported value $(TARGET_ARCH) for TARGET_ARCH!)
+endif
+
+# sbsa and aarch64 systems look similar. Need to differentiate them at host level for now.
+ifeq ($(HOST_ARCH),aarch64)
+    ifeq ($(CUDA_PATH)/targets/sbsa-linux,$(shell ls -1d $(CUDA_PATH)/targets/sbsa-linux 2>/dev/null))
+        HOST_ARCH := sbsa
+        TARGET_ARCH := sbsa
+    endif
+endif
+
+ifneq ($(TARGET_ARCH),$(HOST_ARCH))
+    ifeq (,$(filter $(HOST_ARCH)-$(TARGET_ARCH),aarch64-armv7l x86_64-armv7l x86_64-aarch64 x86_64-sbsa x86_64-ppc64le))
+        $(error ERROR - cross compiling from $(HOST_ARCH) to $(TARGET_ARCH) is not supported!)
+    endif
+endif
+
+# When on native aarch64 system with userspace of 32-bit, change TARGET_ARCH to armv7l
+ifeq ($(HOST_ARCH)-$(TARGET_ARCH)-$(TARGET_SIZE),aarch64-aarch64-32)
+    TARGET_ARCH = armv7l
+endif
+
+# operating system
+HOST_OS   := $(shell uname -s 2>/dev/null | tr "[:upper:]" "[:lower:]")
+TARGET_OS ?= $(HOST_OS)
+ifeq (,$(filter $(TARGET_OS),linux darwin qnx android))
+    $(error ERROR - unsupported value $(TARGET_OS) for TARGET_OS!)
+endif
+
+# host compiler
+ifeq ($(TARGET_OS),darwin)
+    ifeq ($(shell expr `xcodebuild -version | grep -i xcode | awk '{print $$2}' | cut -d'.' -f1` \>= 5),1)
+        HOST_COMPILER ?= clang++
+    endif
+else ifneq ($(TARGET_ARCH),$(HOST_ARCH))
+    ifeq ($(HOST_ARCH)-$(TARGET_ARCH),x86_64-armv7l)
+        ifeq ($(TARGET_OS),linux)
+            HOST_COMPILER ?= arm-linux-gnueabihf-g++
+        else ifeq ($(TARGET_OS),qnx)
+            ifeq ($(QNX_HOST),)
+                $(error ERROR - QNX_HOST must be passed to the QNX host toolchain)
+            endif
+            ifeq ($(QNX_TARGET),)
+                $(error ERROR - QNX_TARGET must be passed to the QNX target toolchain)
+            endif
+            export QNX_HOST
+            export QNX_TARGET
+            HOST_COMPILER ?= $(QNX_HOST)/usr/bin/arm-unknown-nto-qnx6.6.0eabi-g++
+        else ifeq ($(TARGET_OS),android)
+            HOST_COMPILER ?= arm-linux-androideabi-g++
+        endif
+    else ifeq ($(TARGET_ARCH),aarch64)
+        ifeq ($(TARGET_OS), linux)
+            HOST_COMPILER ?= aarch64-linux-gnu-g++
+        else ifeq ($(TARGET_OS),qnx)
+            ifeq ($(QNX_HOST),)
+                $(error ERROR - QNX_HOST must be passed to the QNX host toolchain)
+            endif
+            ifeq ($(QNX_TARGET),)
+                $(error ERROR - QNX_TARGET must be passed to the QNX target toolchain)
+            endif
+            export QNX_HOST
+            export QNX_TARGET
+            HOST_COMPILER ?= $(QNX_HOST)/usr/bin/q++
+        else ifeq ($(TARGET_OS), android)
+            HOST_COMPILER ?= aarch64-linux-android-clang++
+        endif
+    else ifeq ($(TARGET_ARCH),sbsa)
+        HOST_COMPILER ?= aarch64-linux-gnu-g++
+    else ifeq ($(TARGET_ARCH),ppc64le)
+        HOST_COMPILER ?= powerpc64le-linux-gnu-g++
+    endif
+endif
+HOST_COMPILER ?= g++
+NVCC          := $(CUDA_PATH)/bin/nvcc -ccbin $(HOST_COMPILER)
+
+# internal flags
+NVCCFLAGS   := -m${TARGET_SIZE}
+CCFLAGS     :=
+LDFLAGS     :=
+
+# build flags
+ifeq ($(TARGET_OS),darwin)
+    LDFLAGS += -rpath $(CUDA_PATH)/lib
+    CCFLAGS += -arch $(HOST_ARCH)
+else ifeq ($(HOST_ARCH)-$(TARGET_ARCH)-$(TARGET_OS),x86_64-armv7l-linux)
+    LDFLAGS += --dynamic-linker=/lib/ld-linux-armhf.so.3
+    CCFLAGS += -mfloat-abi=hard
+else ifeq ($(TARGET_OS),android)
+    LDFLAGS += -pie
+    CCFLAGS += -fpie -fpic -fexceptions
+endif
+
+ifneq ($(TARGET_ARCH),$(HOST_ARCH))
+    ifeq ($(TARGET_ARCH)-$(TARGET_OS),armv7l-linux)
+        ifneq ($(TARGET_FS),)
+            GCCVERSIONLTEQ46 := $(shell expr `$(HOST_COMPILER) -dumpversion` \<= 4.6)
+            ifeq ($(GCCVERSIONLTEQ46),1)
+                CCFLAGS += --sysroot=$(TARGET_FS)
+            endif
+            LDFLAGS += --sysroot=$(TARGET_FS)
+            LDFLAGS += -rpath-link=$(TARGET_FS)/lib
+            LDFLAGS += -rpath-link=$(TARGET_FS)/usr/lib
+            LDFLAGS += -rpath-link=$(TARGET_FS)/usr/lib/arm-linux-gnueabihf
+        endif
+    endif
+    ifeq ($(TARGET_ARCH)-$(TARGET_OS),aarch64-linux)
+        ifneq ($(TARGET_FS),)
+            GCCVERSIONLTEQ46 := $(shell expr `$(HOST_COMPILER) -dumpversion` \<= 4.6)
+            ifeq ($(GCCVERSIONLTEQ46),1)
+                CCFLAGS += --sysroot=$(TARGET_FS)
+            endif
+            LDFLAGS += --sysroot=$(TARGET_FS)
+            LDFLAGS += -rpath-link=$(TARGET_FS)/lib -L$(TARGET_FS)/lib
+            LDFLAGS += -rpath-link=$(TARGET_FS)/lib/aarch64-linux-gnu -L$(TARGET_FS)/lib/aarch64-linux-gnu
+            LDFLAGS += -rpath-link=$(TARGET_FS)/usr/lib -L$(TARGET_FS)/usr/lib
+            LDFLAGS += -rpath-link=$(TARGET_FS)/usr/lib/aarch64-linux-gnu -L$(TARGET_FS)/usr/lib/aarch64-linux-gnu
+            LDFLAGS += --unresolved-symbols=ignore-in-shared-libs
+            CCFLAGS += -isystem=$(TARGET_FS)/usr/include -I$(TARGET_FS)/usr/include -I$(TARGET_FS)/usr/include/libdrm
+            CCFLAGS += -isystem=$(TARGET_FS)/usr/include/aarch64-linux-gnu -I$(TARGET_FS)/usr/include/aarch64-linux-gnu
+        endif
+    endif
+    ifeq ($(TARGET_ARCH)-$(TARGET_OS),aarch64-qnx)
+        NVCCFLAGS += -D_QNX_SOURCE
+        NVCCFLAGS += --qpp-config 8.3.0,gcc_ntoaarch64le
+        CCFLAGS += -DWIN_INTERFACE_CUSTOM -I/usr/include/aarch64-qnx-gnu
+        LDFLAGS += -lsocket
+        LDFLAGS += -L/usr/lib/aarch64-qnx-gnu
+        CCFLAGS += "-Wl\,-rpath-link\,/usr/lib/aarch64-qnx-gnu"
+        ifdef TARGET_OVERRIDE
+            LDFLAGS += -lslog2
+        endif
+
+        ifneq ($(TARGET_FS),)
+            LDFLAGS += -L$(TARGET_FS)/usr/lib
+            CCFLAGS += "-Wl\,-rpath-link\,$(TARGET_FS)/usr/lib"
+            LDFLAGS += -L$(TARGET_FS)/usr/libnvidia
+            CCFLAGS += "-Wl\,-rpath-link\,$(TARGET_FS)/usr/libnvidia"
+            CCFLAGS += -I$(TARGET_FS)/../include
+        endif
+    endif
+endif
+
+ifdef TARGET_OVERRIDE # cuda toolkit targets override
+    NVCCFLAGS += -target-dir $(TARGET_OVERRIDE)
+endif
+
+# Install directory of different arch
+CUDA_INSTALL_TARGET_DIR :=
+ifeq ($(TARGET_ARCH)-$(TARGET_OS),armv7l-linux)
+    CUDA_INSTALL_TARGET_DIR = targets/armv7-linux-gnueabihf/
+else ifeq ($(TARGET_ARCH)-$(TARGET_OS),aarch64-linux)
+    CUDA_INSTALL_TARGET_DIR = targets/aarch64-linux/
+else ifeq ($(TARGET_ARCH)-$(TARGET_OS),sbsa-linux)
+    CUDA_INSTALL_TARGET_DIR = targets/sbsa-linux/
+else ifeq ($(TARGET_ARCH)-$(TARGET_OS),armv7l-android)
+    CUDA_INSTALL_TARGET_DIR = targets/armv7-linux-androideabi/
+else ifeq ($(TARGET_ARCH)-$(TARGET_OS),aarch64-android)
+    CUDA_INSTALL_TARGET_DIR = targets/aarch64-linux-androideabi/
+else ifeq ($(TARGET_ARCH)-$(TARGET_OS),armv7l-qnx)
+    CUDA_INSTALL_TARGET_DIR = targets/ARMv7-linux-QNX/
+else ifeq ($(TARGET_ARCH)-$(TARGET_OS),aarch64-qnx)
+    CUDA_INSTALL_TARGET_DIR = targets/aarch64-qnx/
+else ifeq ($(TARGET_ARCH),ppc64le)
+    CUDA_INSTALL_TARGET_DIR = targets/ppc64le-linux/
+endif
+
+# Debug build flags
+ifeq ($(dbg),1)
+      NVCCFLAGS += -g -G
+      BUILD_TYPE := debug
+else
+      BUILD_TYPE := release
+endif
+
+ALL_CCFLAGS :=
+ALL_CCFLAGS += $(NVCCFLAGS)
+ALL_CCFLAGS += $(EXTRA_NVCCFLAGS)
+ALL_CCFLAGS += $(addprefix -Xcompiler ,$(CCFLAGS))
+ALL_CCFLAGS += $(addprefix -Xcompiler ,$(EXTRA_CCFLAGS))
+
+SAMPLE_ENABLED := 1
+
+ALL_LDFLAGS :=
+ALL_LDFLAGS += $(ALL_CCFLAGS)
+ALL_LDFLAGS += $(addprefix -Xlinker ,$(LDFLAGS))
+ALL_LDFLAGS += $(addprefix -Xlinker ,$(EXTRA_LDFLAGS))
+
+# Common includes and paths for CUDA
+INCLUDES  := -I../../../Common
+LIBRARIES :=
+
+################################################################################
+
+# Gencode arguments
+ifeq ($(TARGET_ARCH),$(filter $(TARGET_ARCH),armv7l aarch64 sbsa))
+SMS ?= 53 61 70 72 75 80 86 87
+else
+SMS ?= 35 37 50 52 60 61 70 75 80 86
+endif
+
+ifeq ($(SMS),)
+$(info >>> WARNING - no SM architectures have been specified - waiving sample <<<)
+SAMPLE_ENABLED := 0
+endif
+
+ifeq ($(GENCODE_FLAGS),)
+# Generate SASS code for each SM architecture listed in $(SMS)
+$(foreach sm,$(SMS),$(eval GENCODE_FLAGS += -gencode arch=compute_$(sm),code=sm_$(sm)))
+
+# Generate PTX code from the highest SM architecture in $(SMS) to guarantee forward-compatibility
+HIGHEST_SM := $(lastword $(sort $(SMS)))
+ifneq ($(HIGHEST_SM),)
+GENCODE_FLAGS += -gencode arch=compute_$(HIGHEST_SM),code=compute_$(HIGHEST_SM)
+endif
+endif
+
+ALL_CCFLAGS += --threads 0 --std=c++11
+
+ifeq ($(SAMPLE_ENABLED),0)
+EXEC ?= @echo "[@]"
+endif
+
+################################################################################
+
+# Target rules
+all: build
+
+build: dct8x8
+
+check.deps:
+ifeq ($(SAMPLE_ENABLED),0)
+	@echo "Sample will be waived due to the above missing dependencies"
+else
+	@echo "Sample is ready - all dependencies have been met"
+endif
+
+BmpUtil.o:BmpUtil.cpp
+	$(EXEC) $(NVCC) $(INCLUDES) $(ALL_CCFLAGS) $(GENCODE_FLAGS) -o $@ -c $<
+
+DCT8x8_Gold.o:DCT8x8_Gold.cpp
+	$(EXEC) $(NVCC) $(INCLUDES) $(ALL_CCFLAGS) $(GENCODE_FLAGS) -o $@ -c $<
+
+dct8x8.o:dct8x8.cu
+	$(EXEC) $(NVCC) $(INCLUDES) $(ALL_CCFLAGS) $(GENCODE_FLAGS) -o $@ -c $<
+
+dct8x8: BmpUtil.o DCT8x8_Gold.o dct8x8.o
+	$(EXEC) $(NVCC) $(ALL_LDFLAGS) $(GENCODE_FLAGS) -o $@ $+ $(LIBRARIES)
+	$(EXEC) mkdir -p ../../../bin/$(TARGET_ARCH)/$(TARGET_OS)/$(BUILD_TYPE)
+	$(EXEC) cp $@ ../../../bin/$(TARGET_ARCH)/$(TARGET_OS)/$(BUILD_TYPE)
+
+run: build
+	$(EXEC) ./dct8x8
+
+testrun: build
+
+clean:
+	rm -f dct8x8 BmpUtil.o DCT8x8_Gold.o dct8x8.o
+	rm -rf ../../../bin/$(TARGET_ARCH)/$(TARGET_OS)/$(BUILD_TYPE)/dct8x8
+
+clobber: clean

Samples/2_Concepts_and_Techniques/dct8x8/NsightEclipse.xml

@@ -0,0 +1,89 @@
+<?xml version="1.0" encoding="UTF-8"?> 
+<!DOCTYPE entry SYSTEM "SamplesInfo.dtd">
+<entry>
+  <name>dct8x8</name>
+  <cuda_api_list>
+    <toolkit>cudaFree</toolkit>
+    <toolkit>cudaFreeArray</toolkit>
+    <toolkit>cudaDeviceSynchronize</toolkit>
+    <toolkit>cudaDestroyTextureObject</toolkit>
+    <toolkit>cudaMallocPitch</toolkit>
+    <toolkit>cudaCreateTextureObject</toolkit>
+    <toolkit>cudaMallocArray</toolkit>
+  </cuda_api_list>
+  <description><![CDATA[This sample demonstrates how Discrete Cosine Transform (DCT) for blocks of 8 by 8 pixels can be performed using CUDA: a naive implementation by definition and a more traditional approach used in many libraries. As opposed to implementing DCT in a fragment shader, CUDA allows for an easier and more efficient implementation.]]></description>
+  <devicecompilation>whole</devicecompilation>
+  <files>
+    <file>data\teapot512.bmp</file>
+  </files>
+  <includepaths>
+    <path>./</path>
+    <path>../</path>
+    <path>../../../Common</path>
+  </includepaths>
+  <keyconcepts>
+    <concept level="advanced">Image Processing</concept>
+    <concept level="advanced">Video Compression</concept>
+  </keyconcepts>
+  <keywords>
+    <keyword>CUDA</keyword>
+    <keyword>Image Processing</keyword>
+    <keyword>DCT</keyword>
+    <keyword>Discrete Cosine Transfrom</keyword>
+  </keywords>
+  <libraries>
+  </libraries>
+  <librarypaths>
+  </librarypaths>
+  <nsight_eclipse>true</nsight_eclipse>
+  <primary_file>dct8x8.cu</primary_file>
+  <scopes>
+    <scope>1:CUDA Advanced Topics</scope>
+    <scope>2:Image Processing</scope>
+    <scope>2:Data Compression</scope>
+    <scope>2:Video Codecs</scope>
+    <scope>2:Computer Vision</scope>
+  </scopes>
+  <sm-arch>sm35</sm-arch>
+  <sm-arch>sm37</sm-arch>
+  <sm-arch>sm50</sm-arch>
+  <sm-arch>sm52</sm-arch>
+  <sm-arch>sm53</sm-arch>
+  <sm-arch>sm60</sm-arch>
+  <sm-arch>sm61</sm-arch>
+  <sm-arch>sm70</sm-arch>
+  <sm-arch>sm72</sm-arch>
+  <sm-arch>sm75</sm-arch>
+  <sm-arch>sm80</sm-arch>
+  <sm-arch>sm86</sm-arch>
+  <sm-arch>sm87</sm-arch>
+  <supported_envs>
+    <env>
+      <arch>x86_64</arch>
+      <platform>linux</platform>
+    </env>
+    <env>
+      <platform>windows7</platform>
+    </env>
+    <env>
+      <arch>x86_64</arch>
+      <platform>macosx</platform>
+    </env>
+    <env>
+      <arch>arm</arch>
+    </env>
+    <env>
+      <arch>sbsa</arch>
+    </env>
+    <env>
+      <arch>ppc64le</arch>
+      <platform>linux</platform>
+    </env>
+  </supported_envs>
+  <supported_sm_architectures>
+    <include>all</include>
+  </supported_sm_architectures>
+  <title>DCT8x8</title>
+  <type>exe</type>
+  <whitepaper>doc\dct8x8.pdf</whitepaper>
+</entry>

Samples/2_Concepts_and_Techniques/dct8x8/README.md

@@ -0,0 +1,71 @@
+# dct8x8 - DCT8x8
+
+## Description
+
+This sample demonstrates how Discrete Cosine Transform (DCT) for blocks of 8 by 8 pixels can be performed using CUDA: a naive implementation by definition and a more traditional approach used in many libraries. As opposed to implementing DCT in a fragment shader, CUDA allows for an easier and more efficient implementation.
+
+## Key Concepts
+
+Image Processing, Video Compression
+
+## Supported SM Architectures
+
+[SM 3.5 ](https://developer.nvidia.com/cuda-gpus)  [SM 3.7 ](https://developer.nvidia.com/cuda-gpus)  [SM 5.0 ](https://developer.nvidia.com/cuda-gpus)  [SM 5.2 ](https://developer.nvidia.com/cuda-gpus)  [SM 5.3 ](https://developer.nvidia.com/cuda-gpus)  [SM 6.0 ](https://developer.nvidia.com/cuda-gpus)  [SM 6.1 ](https://developer.nvidia.com/cuda-gpus)  [SM 7.0 ](https://developer.nvidia.com/cuda-gpus)  [SM 7.2 ](https://developer.nvidia.com/cuda-gpus)  [SM 7.5 ](https://developer.nvidia.com/cuda-gpus)  [SM 8.0 ](https://developer.nvidia.com/cuda-gpus)  [SM 8.6 ](https://developer.nvidia.com/cuda-gpus)  [SM 8.7 ](https://developer.nvidia.com/cuda-gpus)
+
+## Supported OSes
+
+Linux, Windows
+
+## Supported CPU Architecture
+
+x86_64, ppc64le, armv7l
+
+## CUDA APIs involved
+
+### [CUDA Runtime API](http://docs.nvidia.com/cuda/cuda-runtime-api/index.html)
+cudaFree, cudaFreeArray, cudaDeviceSynchronize, cudaDestroyTextureObject, cudaMallocPitch, cudaCreateTextureObject, cudaMallocArray
+
+## Prerequisites
+
+Download and install the [CUDA Toolkit 11.6](https://developer.nvidia.com/cuda-downloads) for your corresponding platform.
+
+## Build and Run
+
+### Windows
+The Windows samples are built using the Visual Studio IDE. Solution files (.sln) are provided for each supported version of Visual Studio, using the format:
+```
+*_vs<version>.sln - for Visual Studio <version>
+```
+Each individual sample has its own set of solution files in its directory:
+
+To build/examine all the samples at once, the complete solution files should be used. To build/examine a single sample, the individual sample solution files should be used.
+> **Note:** Some samples require that the Microsoft DirectX SDK (June 2010 or newer) be installed and that the VC++ directory paths are properly set up (**Tools > Options...**). Check DirectX Dependencies section for details."
+
+### Linux
+The Linux samples are built using makefiles. To use the makefiles, change the current directory to the sample directory you wish to build, and run make:
+```
+$ cd <sample_dir>
+$ make
+```
+The samples makefiles can take advantage of certain options:
+*  **TARGET_ARCH=<arch>** - cross-compile targeting a specific architecture. Allowed architectures are x86_64, ppc64le, armv7l.
+    By default, TARGET_ARCH is set to HOST_ARCH. On a x86_64 machine, not setting TARGET_ARCH is the equivalent of setting TARGET_ARCH=x86_64.<br/>
+`$ make TARGET_ARCH=x86_64` <br/> `$ make TARGET_ARCH=ppc64le` <br/> `$ make TARGET_ARCH=armv7l` <br/>
+    See [here](http://docs.nvidia.com/cuda/cuda-samples/index.html#cross-samples) for more details.
+*   **dbg=1** - build with debug symbols
+    ```
+    $ make dbg=1
+    ```
+*   **SMS="A B ..."** - override the SM architectures for which the sample will be built, where `"A B ..."` is a space-delimited list of SM architectures. For example, to generate SASS for SM 50 and SM 60, use `SMS="50 60"`.
+    ```
+    $ make SMS="50 60"
+    ```
+
+*  **HOST_COMPILER=<host_compiler>** - override the default g++ host compiler. See the [Linux Installation Guide](http://docs.nvidia.com/cuda/cuda-installation-guide-linux/index.html#system-requirements) for a list of supported host compilers.
+```
+    $ make HOST_COMPILER=g++
+```
+
+## References (for more details)
+
+[whitepaper](./doc/dct8x8.pdf)

Samples/2_Concepts_and_Techniques/dct8x8/dct8x8.cu

@@ -0,0 +1,662 @@
+/* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *  * Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  * Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *  * Neither the name of NVIDIA CORPORATION nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+**************************************************************************
+* \file dct8x8.cu
+* \brief Contains entry point, wrappers to host and device code and benchmark.
+*
+* This sample implements forward and inverse Discrete Cosine Transform to blocks
+* of image pixels (of 8x8 size), as in JPEG standard. The typical work flow is
+*as
+* follows:
+* 1. Run CPU version (Host code) and measure execution time;
+* 2. Run CUDA version (Device code) and measure execution time;
+* 3. Output execution timings and calculate CUDA speedup.
+*/
+
+#include "Common.h"
+#include "DCT8x8_Gold.h"
+#include "BmpUtil.h"
+
+/**
+*  The number of DCT kernel calls
+*/
+#define BENCHMARK_SIZE 10
+
+/**
+*  The PSNR values over this threshold indicate images equality
+*/
+#define PSNR_THRESHOLD_EQUAL 40
+
+// includes kernels
+#include "dct8x8_kernel1.cuh"
+#include "dct8x8_kernel2.cuh"
+#include "dct8x8_kernel_short.cuh"
+#include "dct8x8_kernel_quantization.cuh"
+
+/**
+**************************************************************************
+*  Wrapper function for 1st gold version of DCT, quantization and IDCT
+*implementations
+*
+* \param ImgSrc         [IN] - Source byte image plane
+* \param ImgDst         [IN] - Quantized result byte image plane
+* \param Stride         [IN] - Stride for both source and result planes
+* \param Size           [IN] - Size of both planes
+*
+* \return Execution time in milliseconds
+*/
+float WrapperGold1(byte *ImgSrc, byte *ImgDst, int Stride, ROI Size) {
+  // allocate float buffers for DCT and other data
+  int StrideF;
+  float *ImgF1 = MallocPlaneFloat(Size.width, Size.height, &StrideF);
+  float *ImgF2 = MallocPlaneFloat(Size.width, Size.height, &StrideF);
+
+  // convert source image to float representation
+  CopyByte2Float(ImgSrc, Stride, ImgF1, StrideF, Size);
+  AddFloatPlane(-128.0f, ImgF1, StrideF, Size);
+
+  // create and start CUDA timer
+  StopWatchInterface *timerGold = 0;
+  sdkCreateTimer(&timerGold);
+  sdkResetTimer(&timerGold);
+
+  // perform block-wise DCT processing and benchmarking
+  for (int i = 0; i < BENCHMARK_SIZE; i++) {
+    sdkStartTimer(&timerGold);
+    computeDCT8x8Gold1(ImgF1, ImgF2, StrideF, Size);
+    sdkStopTimer(&timerGold);
+  }
+
+  // stop and destroy CUDA timer
+  float TimerGoldSpan = sdkGetAverageTimerValue(&timerGold);
+  sdkDeleteTimer(&timerGold);
+
+  // perform quantization
+  quantizeGoldFloat(ImgF2, StrideF, Size);
+
+  // perform block-wise IDCT processing
+  computeIDCT8x8Gold1(ImgF2, ImgF1, StrideF, Size);
+
+  // convert image back to byte representation
+  AddFloatPlane(128.0f, ImgF1, StrideF, Size);
+  CopyFloat2Byte(ImgF1, StrideF, ImgDst, Stride, Size);
+
+  // free float buffers
+  FreePlane(ImgF1);
+  FreePlane(ImgF2);
+
+  // return time taken by the operation
+  return TimerGoldSpan;
+}
+
+/**
+**************************************************************************
+*  Wrapper function for 2nd gold version of DCT, quantization and IDCT
+*implementations
+*
+* \param ImgSrc         [IN] - Source byte image plane
+* \param ImgDst         [IN] - Quantized result byte image plane
+* \param Stride         [IN] - Stride for both source and result planes
+* \param Size           [IN] - Size of both planes
+*
+* \return Execution time in milliseconds
+*/
+float WrapperGold2(byte *ImgSrc, byte *ImgDst, int Stride, ROI Size) {
+  // allocate float buffers for DCT and other data
+  int StrideF;
+  float *ImgF1 = MallocPlaneFloat(Size.width, Size.height, &StrideF);
+  float *ImgF2 = MallocPlaneFloat(Size.width, Size.height, &StrideF);
+
+  // convert source image to float representation
+  CopyByte2Float(ImgSrc, Stride, ImgF1, StrideF, Size);
+  AddFloatPlane(-128.0f, ImgF1, StrideF, Size);
+
+  // create and start CUDA timer
+  StopWatchInterface *timerGold = 0;
+  sdkCreateTimer(&timerGold);
+  sdkResetTimer(&timerGold);
+
+  // perform block-wise DCT processing and benchmarking
+  for (int i = 0; i < BENCHMARK_SIZE; i++) {
+    sdkStartTimer(&timerGold);
+    computeDCT8x8Gold2(ImgF1, ImgF2, StrideF, Size);
+    sdkStopTimer(&timerGold);
+  }
+
+  // stop and destroy CUDA timer
+  float TimerGoldSpan = sdkGetAverageTimerValue(&timerGold);
+  sdkDeleteTimer(&timerGold);
+
+  // perform quantization
+  quantizeGoldFloat(ImgF2, StrideF, Size);
+
+  // perform block-wise IDCT processing
+  computeIDCT8x8Gold2(ImgF2, ImgF1, StrideF, Size);
+
+  // convert image back to byte representation
+  AddFloatPlane(128.0f, ImgF1, StrideF, Size);
+  CopyFloat2Byte(ImgF1, StrideF, ImgDst, Stride, Size);
+
+  // free float buffers
+  FreePlane(ImgF1);
+  FreePlane(ImgF2);
+
+  // return time taken by the operation
+  return TimerGoldSpan;
+}
+
+/**
+**************************************************************************
+*  Wrapper function for 1st CUDA version of DCT, quantization and IDCT
+*implementations
+*
+* \param ImgSrc         [IN] - Source byte image plane
+* \param ImgDst         [IN] - Quantized result byte image plane
+* \param Stride         [IN] - Stride for both source and result planes
+* \param Size           [IN] - Size of both planes
+*
+* \return Execution time in milliseconds
+*/
+float WrapperCUDA1(byte *ImgSrc, byte *ImgDst, int Stride, ROI Size) {
+  // prepare channel format descriptor for passing texture into kernels
+  cudaChannelFormatDesc floattex = cudaCreateChannelDesc<float>();
+
+  // allocate device memory
+  cudaArray *Src;
+  float *Dst;
+  size_t DstStride;
+  checkCudaErrors(cudaMallocArray(&Src, &floattex, Size.width, Size.height));
+  checkCudaErrors(cudaMallocPitch((void **)(&Dst), &DstStride,
+                                  Size.width * sizeof(float), Size.height));
+  DstStride /= sizeof(float);
+
+  // convert source image to float representation
+  int ImgSrcFStride;
+  float *ImgSrcF = MallocPlaneFloat(Size.width, Size.height, &ImgSrcFStride);
+  CopyByte2Float(ImgSrc, Stride, ImgSrcF, ImgSrcFStride, Size);
+  AddFloatPlane(-128.0f, ImgSrcF, ImgSrcFStride, Size);
+
+  // copy from host memory to device
+  checkCudaErrors(cudaMemcpy2DToArray(
+      Src, 0, 0, ImgSrcF, ImgSrcFStride * sizeof(float),
+      Size.width * sizeof(float), Size.height, cudaMemcpyHostToDevice));
+
+  // setup execution parameters
+  dim3 threads(BLOCK_SIZE, BLOCK_SIZE);
+  dim3 grid(Size.width / BLOCK_SIZE, Size.height / BLOCK_SIZE);
+
+  // create and start CUDA timer
+  StopWatchInterface *timerCUDA = 0;
+  sdkCreateTimer(&timerCUDA);
+  sdkResetTimer(&timerCUDA);
+
+  // execute DCT kernel and benchmark
+  cudaTextureObject_t TexSrc;
+  cudaResourceDesc texRes;
+  memset(&texRes, 0, sizeof(cudaResourceDesc));
+
+  texRes.resType = cudaResourceTypeArray;
+  texRes.res.array.array = Src;
+
+  cudaTextureDesc texDescr;
+  memset(&texDescr, 0, sizeof(cudaTextureDesc));
+
+  texDescr.normalizedCoords = false;
+  texDescr.filterMode = cudaFilterModeLinear;
+  texDescr.addressMode[0] = cudaAddressModeWrap;
+  texDescr.addressMode[1] = cudaAddressModeWrap;
+  texDescr.readMode = cudaReadModeElementType;
+
+  checkCudaErrors(cudaCreateTextureObject(&TexSrc, &texRes, &texDescr, NULL));
+
+  for (int i = 0; i < BENCHMARK_SIZE; i++) {
+    sdkStartTimer(&timerCUDA);
+    CUDAkernel1DCT<<<grid, threads>>>(Dst, (int)DstStride, 0, 0, TexSrc);
+    checkCudaErrors(cudaDeviceSynchronize());
+    sdkStopTimer(&timerCUDA);
+  }
+
+  getLastCudaError("Kernel execution failed");
+
+  // finalize CUDA timer
+  float TimerCUDASpan = sdkGetAverageTimerValue(&timerCUDA);
+  sdkDeleteTimer(&timerCUDA);
+
+  // execute Quantization kernel
+  CUDAkernelQuantizationFloat<<<grid, threads>>>(Dst, (int)DstStride);
+  getLastCudaError("Kernel execution failed");
+
+  // copy quantized coefficients from host memory to device array
+  checkCudaErrors(cudaMemcpy2DToArray(Src, 0, 0, Dst, DstStride * sizeof(float),
+                                      Size.width * sizeof(float), Size.height,
+                                      cudaMemcpyDeviceToDevice));
+
+  // execute IDCT kernel
+  CUDAkernel1IDCT<<<grid, threads>>>(Dst, (int)DstStride, 0, 0, TexSrc);
+  getLastCudaError("Kernel execution failed");
+
+  // copy quantized image block to host
+  checkCudaErrors(cudaMemcpy2D(
+      ImgSrcF, ImgSrcFStride * sizeof(float), Dst, DstStride * sizeof(float),
+      Size.width * sizeof(float), Size.height, cudaMemcpyDeviceToHost));
+
+  // convert image back to byte representation
+  AddFloatPlane(128.0f, ImgSrcF, ImgSrcFStride, Size);
+  CopyFloat2Byte(ImgSrcF, ImgSrcFStride, ImgDst, Stride, Size);
+
+  // clean up memory
+  checkCudaErrors(cudaDestroyTextureObject(TexSrc));
+  checkCudaErrors(cudaFreeArray(Src));
+  checkCudaErrors(cudaFree(Dst));
+  FreePlane(ImgSrcF);
+
+  // return time taken by the operation
+  return TimerCUDASpan;
+}
+
+/**
+**************************************************************************
+*  Wrapper function for 2nd CUDA version of DCT, quantization and IDCT
+*implementations
+*
+* \param ImgSrc         [IN] - Source byte image plane
+* \param ImgDst         [IN] - Quantized result byte image plane
+* \param Stride         [IN] - Stride for both source and result planes
+* \param Size           [IN] - Size of both planes
+*
+* \return Execution time in milliseconds
+*/
+
+float WrapperCUDA2(byte *ImgSrc, byte *ImgDst, int Stride, ROI Size) {
+  // allocate host buffers for DCT and other data
+  int StrideF;
+  float *ImgF1 = MallocPlaneFloat(Size.width, Size.height, &StrideF);
+
+  // convert source image to float representation
+  CopyByte2Float(ImgSrc, Stride, ImgF1, StrideF, Size);
+  AddFloatPlane(-128.0f, ImgF1, StrideF, Size);
+
+  // allocate device memory
+  float *src, *dst;
+  size_t DeviceStride;
+  checkCudaErrors(cudaMallocPitch((void **)&src, &DeviceStride,
+                                  Size.width * sizeof(float), Size.height));
+  checkCudaErrors(cudaMallocPitch((void **)&dst, &DeviceStride,
+                                  Size.width * sizeof(float), Size.height));
+  DeviceStride /= sizeof(float);
+
+  // copy from host memory to device
+  checkCudaErrors(cudaMemcpy2D(
+      src, DeviceStride * sizeof(float), ImgF1, StrideF * sizeof(float),
+      Size.width * sizeof(float), Size.height, cudaMemcpyHostToDevice));
+
+  // create and start CUDA timer
+  StopWatchInterface *timerCUDA = 0;
+  sdkCreateTimer(&timerCUDA);
+
+  // setup execution parameters
+  dim3 GridFullWarps(Size.width / KER2_BLOCK_WIDTH,
+                     Size.height / KER2_BLOCK_HEIGHT, 1);
+  dim3 ThreadsFullWarps(8, KER2_BLOCK_WIDTH / 8, KER2_BLOCK_HEIGHT / 8);
+
+  // perform block-wise DCT processing and benchmarking
+  const int numIterations = 100;
+
+  for (int i = -1; i < numIterations; i++) {
+    if (i == 0) {
+      checkCudaErrors(cudaDeviceSynchronize());
+      sdkResetTimer(&timerCUDA);
+      sdkStartTimer(&timerCUDA);
+    }
+
+    CUDAkernel2DCT<<<GridFullWarps, ThreadsFullWarps>>>(dst, src,
+                                                        (int)DeviceStride);
+    getLastCudaError("Kernel execution failed");
+  }
+
+  checkCudaErrors(cudaDeviceSynchronize());
+  sdkStopTimer(&timerCUDA);
+
+  // finalize timing of CUDA Kernels
+  float avgTime = (float)sdkGetTimerValue(&timerCUDA) / (float)numIterations;
+  sdkDeleteTimer(&timerCUDA);
+  printf("%f MPix/s //%f ms\n",
+         (1E-6 * (float)Size.width * (float)Size.height) / (1E-3 * avgTime),
+         avgTime);
+
+  // setup execution parameters for quantization
+  dim3 ThreadsSmallBlocks(BLOCK_SIZE, BLOCK_SIZE);
+  dim3 GridSmallBlocks(Size.width / BLOCK_SIZE, Size.height / BLOCK_SIZE);
+
+  // execute Quantization kernel
+  CUDAkernelQuantizationFloat<<<GridSmallBlocks, ThreadsSmallBlocks>>>(
+      dst, (int)DeviceStride);
+  getLastCudaError("Kernel execution failed");
+
+  // perform block-wise IDCT processing
+  CUDAkernel2IDCT<<<GridFullWarps, ThreadsFullWarps>>>(src, dst,
+                                                       (int)DeviceStride);
+  checkCudaErrors(cudaDeviceSynchronize());
+  getLastCudaError("Kernel execution failed");
+
+  // copy quantized image block to host
+  checkCudaErrors(cudaMemcpy2D(
+      ImgF1, StrideF * sizeof(float), src, DeviceStride * sizeof(float),
+      Size.width * sizeof(float), Size.height, cudaMemcpyDeviceToHost));
+
+  // convert image back to byte representation
+  AddFloatPlane(128.0f, ImgF1, StrideF, Size);
+  CopyFloat2Byte(ImgF1, StrideF, ImgDst, Stride, Size);
+
+  // clean up memory
+  checkCudaErrors(cudaFree(dst));
+  checkCudaErrors(cudaFree(src));
+  FreePlane(ImgF1);
+
+  // return time taken by the operation
+  return avgTime;
+}
+
+/**
+**************************************************************************
+*  Wrapper function for short CUDA version of DCT, quantization and IDCT
+*implementations
+*
+* \param ImgSrc         [IN] - Source byte image plane
+* \param ImgDst         [IN] - Quantized result byte image plane
+* \param Stride         [IN] - Stride for both source and result planes
+* \param Size           [IN] - Size of both planes
+*
+* \return Execution time in milliseconds
+*/
+float WrapperCUDAshort(byte *ImgSrc, byte *ImgDst, int Stride, ROI Size) {
+  // allocate host buffers for DCT and other data
+  int StrideS;
+  short *ImgS1 = MallocPlaneShort(Size.width, Size.height, &StrideS);
+
+  // convert source image to short representation centered at 128
+  for (int i = 0; i < Size.height; i++) {
+    for (int j = 0; j < Size.width; j++) {
+      ImgS1[i * StrideS + j] = (short)ImgSrc[i * Stride + j] - 128;
+    }
+  }
+
+  // allocate device memory
+  short *SrcDst;
+  size_t DeviceStride;
+  checkCudaErrors(cudaMallocPitch((void **)(&SrcDst), &DeviceStride,
+                                  Size.width * sizeof(short), Size.height));
+  DeviceStride /= sizeof(short);
+
+  // copy from host memory to device
+  checkCudaErrors(cudaMemcpy2D(
+      SrcDst, DeviceStride * sizeof(short), ImgS1, StrideS * sizeof(short),
+      Size.width * sizeof(short), Size.height, cudaMemcpyHostToDevice));
+
+  // create and start CUDA timer
+  StopWatchInterface *timerLibJpeg = 0;
+  sdkCreateTimer(&timerLibJpeg);
+  sdkResetTimer(&timerLibJpeg);
+
+  // setup execution parameters
+  dim3 GridShort(Size.width / KERS_BLOCK_WIDTH, Size.height / KERS_BLOCK_HEIGHT,
+                 1);
+  dim3 ThreadsShort(8, KERS_BLOCK_WIDTH / 8, KERS_BLOCK_HEIGHT / 8);
+
+  // perform block-wise DCT processing and benchmarking
+  sdkStartTimer(&timerLibJpeg);
+  CUDAkernelShortDCT<<<GridShort, ThreadsShort>>>(SrcDst, (int)DeviceStride);
+  checkCudaErrors(cudaDeviceSynchronize());
+  sdkStopTimer(&timerLibJpeg);
+  getLastCudaError("Kernel execution failed");
+
+  // stop and destroy CUDA timer
+  float TimerLibJpegSpan16b = sdkGetAverageTimerValue(&timerLibJpeg);
+  sdkDeleteTimer(&timerLibJpeg);
+
+  // setup execution parameters for quantization
+  dim3 ThreadsSmallBlocks(BLOCK_SIZE, BLOCK_SIZE);
+  dim3 GridSmallBlocks(Size.width / BLOCK_SIZE, Size.height / BLOCK_SIZE);
+
+  // execute Quantization kernel
+  CUDAkernelQuantizationShort<<<GridSmallBlocks, ThreadsSmallBlocks>>>(
+      SrcDst, (int)DeviceStride);
+  getLastCudaError("Kernel execution failed");
+
+  // perform block-wise IDCT processing
+  CUDAkernelShortIDCT<<<GridShort, ThreadsShort>>>(SrcDst, (int)DeviceStride);
+  checkCudaErrors(cudaDeviceSynchronize());
+  getLastCudaError("Kernel execution failed");
+
+  // copy quantized image block to host
+  checkCudaErrors(cudaMemcpy2D(
+      ImgS1, StrideS * sizeof(short), SrcDst, DeviceStride * sizeof(short),
+      Size.width * sizeof(short), Size.height, cudaMemcpyDeviceToHost));
+
+  // convert image back to byte representation
+  for (int i = 0; i < Size.height; i++) {
+    for (int j = 0; j < Size.width; j++) {
+      ImgDst[i * Stride + j] = clamp_0_255(ImgS1[i * StrideS + j] + 128);
+    }
+  }
+
+  // free float buffers
+  checkCudaErrors(cudaFree(SrcDst));
+  FreePlane(ImgS1);
+
+  // return time taken by the operation
+  return TimerLibJpegSpan16b;
+}
+
+/**
+**************************************************************************
+*  Program entry point
+*
+* \param argc       [IN] - Number of command-line arguments
+* \param argv       [IN] - Array of command-line arguments
+*
+* \return Status code
+*/
+
+int main(int argc, char **argv) {
+  //
+  // Sample initialization
+  //
+  printf("%s Starting...\n\n", argv[0]);
+
+  // initialize CUDA
+  findCudaDevice(argc, (const char **)argv);
+
+  // source and results image filenames
+  char SampleImageFname[] = "teapot512.bmp";
+  char SampleImageFnameResGold1[] = "teapot512_gold1.bmp";
+  char SampleImageFnameResGold2[] = "teapot512_gold2.bmp";
+  char SampleImageFnameResCUDA1[] = "teapot512_cuda1.bmp";
+  char SampleImageFnameResCUDA2[] = "teapot512_cuda2.bmp";
+  char SampleImageFnameResCUDAshort[] = "teapot512_cuda_short.bmp";
+
+  char *pSampleImageFpath = sdkFindFilePath(SampleImageFname, argv[0]);
+
+  if (pSampleImageFpath == NULL) {
+    printf("dct8x8 could not locate Sample Image <%s>\nExiting...\n",
+           pSampleImageFpath);
+    exit(EXIT_FAILURE);
+  }
+
+  // preload image (acquire dimensions)
+  int ImgWidth, ImgHeight;
+  ROI ImgSize;
+  int res = PreLoadBmp(pSampleImageFpath, &ImgWidth, &ImgHeight);
+  ImgSize.width = ImgWidth;
+  ImgSize.height = ImgHeight;
+
+  // CONSOLE INFORMATION: saying hello to user
+  printf("CUDA sample DCT/IDCT implementation\n");
+  printf("===================================\n");
+  printf("Loading test image: %s... ", SampleImageFname);
+
+  if (res) {
+    printf("\nError: Image file not found or invalid!\n");
+    exit(EXIT_FAILURE);
+    return 1;
+  }
+
+  // check image dimensions are multiples of BLOCK_SIZE
+  if (ImgWidth % BLOCK_SIZE != 0 || ImgHeight % BLOCK_SIZE != 0) {
+    printf("\nError: Input image dimensions must be multiples of 8!\n");
+    exit(EXIT_FAILURE);
+    return 1;
+  }
+
+  printf("[%d x %d]... ", ImgWidth, ImgHeight);
+
+  // allocate image buffers
+  int ImgStride;
+  byte *ImgSrc = MallocPlaneByte(ImgWidth, ImgHeight, &ImgStride);
+  byte *ImgDstGold1 = MallocPlaneByte(ImgWidth, ImgHeight, &ImgStride);
+  byte *ImgDstGold2 = MallocPlaneByte(ImgWidth, ImgHeight, &ImgStride);
+  byte *ImgDstCUDA1 = MallocPlaneByte(ImgWidth, ImgHeight, &ImgStride);
+  byte *ImgDstCUDA2 = MallocPlaneByte(ImgWidth, ImgHeight, &ImgStride);
+  byte *ImgDstCUDAshort = MallocPlaneByte(ImgWidth, ImgHeight, &ImgStride);
+
+  // load sample image
+  LoadBmpAsGray(pSampleImageFpath, ImgStride, ImgSize, ImgSrc);
+
+  //
+  // RUNNING WRAPPERS
+  //
+
+  // compute Gold 1 version of DCT/quantization/IDCT
+  printf("Success\nRunning Gold 1 (CPU) version... ");
+  float TimeGold1 = WrapperGold1(ImgSrc, ImgDstGold1, ImgStride, ImgSize);
+
+  // compute Gold 2 version of DCT/quantization/IDCT
+  printf("Success\nRunning Gold 2 (CPU) version... ");
+  float TimeGold2 = WrapperGold2(ImgSrc, ImgDstGold2, ImgStride, ImgSize);
+
+  // compute CUDA 1 version of DCT/quantization/IDCT
+  printf("Success\nRunning CUDA 1 (GPU) version... ");
+  float TimeCUDA1 = WrapperCUDA1(ImgSrc, ImgDstCUDA1, ImgStride, ImgSize);
+
+  // compute CUDA 2 version of DCT/quantization/IDCT
+  printf("Success\nRunning CUDA 2 (GPU) version... ");
+  float TimeCUDA2 = WrapperCUDA2(ImgSrc, ImgDstCUDA2, ImgStride, ImgSize);
+
+  // compute CUDA short version of DCT/quantization/IDCT
+  printf("Success\nRunning CUDA short (GPU) version... ");
+  float TimeCUDAshort =
+      WrapperCUDAshort(ImgSrc, ImgDstCUDAshort, ImgStride, ImgSize);
+  //
+  // Execution statistics, result saving and validation
+  //
+
+  // dump result of Gold 1 processing
+  printf("Success\nDumping result to %s... ", SampleImageFnameResGold1);
+  DumpBmpAsGray(SampleImageFnameResGold1, ImgDstGold1, ImgStride, ImgSize);
+
+  // dump result of Gold 2 processing
+  printf("Success\nDumping result to %s... ", SampleImageFnameResGold2);
+  DumpBmpAsGray(SampleImageFnameResGold2, ImgDstGold2, ImgStride, ImgSize);
+
+  // dump result of CUDA 1 processing
+  printf("Success\nDumping result to %s... ", SampleImageFnameResCUDA1);
+  DumpBmpAsGray(SampleImageFnameResCUDA1, ImgDstCUDA1, ImgStride, ImgSize);
+
+  // dump result of CUDA 2 processing
+  printf("Success\nDumping result to %s... ", SampleImageFnameResCUDA2);
+  DumpBmpAsGray(SampleImageFnameResCUDA2, ImgDstCUDA2, ImgStride, ImgSize);
+
+  // dump result of CUDA short processing
+  printf("Success\nDumping result to %s... ", SampleImageFnameResCUDAshort);
+  DumpBmpAsGray(SampleImageFnameResCUDAshort, ImgDstCUDAshort, ImgStride,
+                ImgSize);
+  // print speed info
+  printf("Success\n");
+
+  printf("Processing time (CUDA 1)    : %f ms \n", TimeCUDA1);
+  printf("Processing time (CUDA 2)    : %f ms \n", TimeCUDA2);
+  printf("Processing time (CUDA short): %f ms \n", TimeCUDAshort);
+
+  // calculate PSNR between each pair of images
+  float PSNR_Src_DstGold1 =
+      CalculatePSNR(ImgSrc, ImgDstGold1, ImgStride, ImgSize);
+  float PSNR_Src_DstGold2 =
+      CalculatePSNR(ImgSrc, ImgDstGold2, ImgStride, ImgSize);
+  float PSNR_Src_DstCUDA1 =
+      CalculatePSNR(ImgSrc, ImgDstCUDA1, ImgStride, ImgSize);
+  float PSNR_Src_DstCUDA2 =
+      CalculatePSNR(ImgSrc, ImgDstCUDA2, ImgStride, ImgSize);
+  float PSNR_Src_DstCUDAshort =
+      CalculatePSNR(ImgSrc, ImgDstCUDAshort, ImgStride, ImgSize);
+  float PSNR_DstGold1_DstCUDA1 =
+      CalculatePSNR(ImgDstGold1, ImgDstCUDA1, ImgStride, ImgSize);
+  float PSNR_DstGold2_DstCUDA2 =
+      CalculatePSNR(ImgDstGold2, ImgDstCUDA2, ImgStride, ImgSize);
+  float PSNR_DstGold2_DstCUDA16b =
+      CalculatePSNR(ImgDstGold2, ImgDstCUDAshort, ImgStride, ImgSize);
+
+  printf("PSNR Original    <---> CPU(Gold 1)    : %f\n", PSNR_Src_DstGold1);
+  printf("PSNR Original    <---> CPU(Gold 2)    : %f\n", PSNR_Src_DstGold2);
+  printf("PSNR Original    <---> GPU(CUDA 1)    : %f\n", PSNR_Src_DstCUDA1);
+  printf("PSNR Original    <---> GPU(CUDA 2)    : %f\n", PSNR_Src_DstCUDA2);
+  printf("PSNR Original    <---> GPU(CUDA short): %f\n", PSNR_Src_DstCUDAshort);
+  printf("PSNR CPU(Gold 1) <---> GPU(CUDA 1)    : %f\n",
+         PSNR_DstGold1_DstCUDA1);
+  printf("PSNR CPU(Gold 2) <---> GPU(CUDA 2)    : %f\n",
+         PSNR_DstGold2_DstCUDA2);
+  printf("PSNR CPU(Gold 2) <---> GPU(CUDA short): %f\n",
+         PSNR_DstGold2_DstCUDA16b);
+
+  bool bTestResult = (PSNR_DstGold1_DstCUDA1 > PSNR_THRESHOLD_EQUAL &&
+                      PSNR_DstGold2_DstCUDA2 > PSNR_THRESHOLD_EQUAL &&
+                      PSNR_DstGold2_DstCUDA16b > PSNR_THRESHOLD_EQUAL);
+
+  //
+  // Finalization
+  //
+
+  // release byte planes
+  FreePlane(ImgSrc);
+  FreePlane(ImgDstGold1);
+  FreePlane(ImgDstGold2);
+  FreePlane(ImgDstCUDA1);
+  FreePlane(ImgDstCUDA2);
+  FreePlane(ImgDstCUDAshort);
+
+  // finalize
+  printf("\nTest Summary...\n");
+
+  if (!bTestResult) {
+    printf("Test failed!\n");
+    exit(EXIT_FAILURE);
+  }
+
+  printf("Test passed\n");
+  exit(EXIT_SUCCESS);
+}

Samples/2_Concepts_and_Techniques/dct8x8/dct8x8_kernel1.cuh

@@ -0,0 +1,234 @@
+/* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *  * Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  * Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *  * Neither the name of NVIDIA CORPORATION nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+**************************************************************************
+* \file dct8x8_kernel1.cu
+* \brief Contains 1st CUDA implementations of DCT, IDCT and quantization
+*routines,
+*        used in JPEG internal data processing. Device code.
+*
+* This code implements first CUDA versions of forward and inverse Discrete
+*Cosine
+* Transform to blocks of image pixels (of 8x8 size), as in JPEG standard. The
+*data
+* processing is done using floating point representation.
+* The routine that performs quantization of coefficients can be found in
+* dct8x8_kernel_quantization.cu file.
+*/
+#pragma once
+#include <cooperative_groups.h>
+
+namespace cg = cooperative_groups;
+#include "Common.h"
+
+/**
+*  This unitary matrix performs discrete cosine transform of rows of the matrix
+* to the left
+*/
+__constant__ float DCTv8matrix[] = {
+  0.3535533905932738f,  0.4903926402016152f,  0.4619397662556434f,  0.4157348061512726f,  0.3535533905932738f,  0.2777851165098011f,  0.1913417161825449f,  0.0975451610080642f,
+  0.3535533905932738f,  0.4157348061512726f,  0.1913417161825449f, -0.0975451610080641f, -0.3535533905932737f, -0.4903926402016152f, -0.4619397662556434f, -0.2777851165098011f,
+  0.3535533905932738f,  0.2777851165098011f, -0.1913417161825449f, -0.4903926402016152f, -0.3535533905932738f,  0.0975451610080642f,  0.4619397662556433f,  0.4157348061512727f,
+  0.3535533905932738f,  0.0975451610080642f, -0.4619397662556434f, -0.2777851165098011f,  0.3535533905932737f,  0.4157348061512727f, -0.1913417161825450f, -0.4903926402016153f,
+  0.3535533905932738f, -0.0975451610080641f, -0.4619397662556434f,  0.2777851165098009f,  0.3535533905932738f, -0.4157348061512726f, -0.1913417161825453f,  0.4903926402016152f,
+  0.3535533905932738f, -0.2777851165098010f, -0.1913417161825452f,  0.4903926402016153f, -0.3535533905932733f, -0.0975451610080649f,  0.4619397662556437f, -0.4157348061512720f,
+  0.3535533905932738f, -0.4157348061512727f,  0.1913417161825450f,  0.0975451610080640f, -0.3535533905932736f,  0.4903926402016152f, -0.4619397662556435f,  0.2777851165098022f,
+  0.3535533905932738f, -0.4903926402016152f,  0.4619397662556433f, -0.4157348061512721f,  0.3535533905932733f, -0.2777851165098008f,  0.1913417161825431f, -0.0975451610080625f
+};
+
+// Temporary blocks
+__shared__ float CurBlockLocal1[BLOCK_SIZE2];
+__shared__ float CurBlockLocal2[BLOCK_SIZE2];
+
+/**
+**************************************************************************
+*  Performs 1st implementation of 8x8 block-wise Forward Discrete Cosine
+*Transform of the given
+*  image plane and outputs result to the array of coefficients.
+*
+* \param Dst            [OUT] - Coefficients plane
+* \param ImgWidth       [IN] - Stride of Dst
+* \param OffsetXBlocks  [IN] - Offset along X in blocks from which to perform
+*processing
+* \param OffsetYBlocks  [IN] - Offset along Y in blocks from which to perform
+*processing
+*
+* \return None
+*/
+__global__ void CUDAkernel1DCT(float *Dst, int ImgWidth, int OffsetXBlocks,
+                               int OffsetYBlocks, cudaTextureObject_t TexSrc) {
+  // Handle to thread block group
+  cg::thread_block cta = cg::this_thread_block();
+  // Block index
+  const int bx = blockIdx.x + OffsetXBlocks;
+  const int by = blockIdx.y + OffsetYBlocks;
+
+  // Thread index (current coefficient)
+  const int tx = threadIdx.x;
+  const int ty = threadIdx.y;
+
+  // Texture coordinates
+  const float tex_x = (float)((bx << BLOCK_SIZE_LOG2) + tx) + 0.5f;
+  const float tex_y = (float)((by << BLOCK_SIZE_LOG2) + ty) + 0.5f;
+
+  // copy current image pixel to the first block
+  CurBlockLocal1[(ty << BLOCK_SIZE_LOG2) + tx] =
+      tex2D<float>(TexSrc, tex_x, tex_y);
+
+  // synchronize threads to make sure the block is copied
+  cg::sync(cta);
+
+  // calculate the multiplication of DCTv8matrixT * A and place it in the second
+  // block
+  float curelem = 0;
+  int DCTv8matrixIndex = 0 * BLOCK_SIZE + ty;
+  int CurBlockLocal1Index = 0 * BLOCK_SIZE + tx;
+#pragma unroll
+
+  for (int i = 0; i < BLOCK_SIZE; i++) {
+    curelem +=
+        DCTv8matrix[DCTv8matrixIndex] * CurBlockLocal1[CurBlockLocal1Index];
+    DCTv8matrixIndex += BLOCK_SIZE;
+    CurBlockLocal1Index += BLOCK_SIZE;
+  }
+
+  CurBlockLocal2[(ty << BLOCK_SIZE_LOG2) + tx] = curelem;
+
+  // synchronize threads to make sure the first 2 matrices are multiplied and
+  // the result is stored in the second block
+  cg::sync(cta);
+
+  // calculate the multiplication of (DCTv8matrixT * A) * DCTv8matrix and place
+  // it in the first block
+  curelem = 0;
+  int CurBlockLocal2Index = (ty << BLOCK_SIZE_LOG2) + 0;
+  DCTv8matrixIndex = 0 * BLOCK_SIZE + tx;
+#pragma unroll
+
+  for (int i = 0; i < BLOCK_SIZE; i++) {
+    curelem +=
+        CurBlockLocal2[CurBlockLocal2Index] * DCTv8matrix[DCTv8matrixIndex];
+    CurBlockLocal2Index += 1;
+    DCTv8matrixIndex += BLOCK_SIZE;
+  }
+
+  CurBlockLocal1[(ty << BLOCK_SIZE_LOG2) + tx] = curelem;
+
+  // synchronize threads to make sure the matrices are multiplied and the result
+  // is stored back in the first block
+  cg::sync(cta);
+
+  // copy current coefficient to its place in the result array
+  Dst[FMUL(((by << BLOCK_SIZE_LOG2) + ty), ImgWidth) +
+      ((bx << BLOCK_SIZE_LOG2) + tx)] =
+      CurBlockLocal1[(ty << BLOCK_SIZE_LOG2) + tx];
+}
+
+/**
+**************************************************************************
+*  Performs 1st implementation of 8x8 block-wise Inverse Discrete Cosine
+*Transform of the given
+*  DCT coefficients plane and outputs result to the image array
+*
+* \param Dst            [OUT] - Image plane
+* \param ImgWidth       [IN] - Stride of Dst
+* \param OffsetXBlocks  [IN] - Offset along X in blocks from which to perform
+*processing
+* \param OffsetYBlocks  [IN] - Offset along Y in blocks from which to perform
+*processing
+*
+* \return None
+*/
+__global__ void CUDAkernel1IDCT(float *Dst, int ImgWidth, int OffsetXBlocks,
+                                int OffsetYBlocks, cudaTextureObject_t TexSrc) {
+  // Handle to thread block group
+  cg::thread_block cta = cg::this_thread_block();
+  // Block index
+  int bx = blockIdx.x + OffsetXBlocks;
+  int by = blockIdx.y + OffsetYBlocks;
+
+  // Thread index (current image pixel)
+  int tx = threadIdx.x;
+  int ty = threadIdx.y;
+
+  // Texture coordinates
+  const float tex_x = (float)((bx << BLOCK_SIZE_LOG2) + tx) + 0.5f;
+  const float tex_y = (float)((by << BLOCK_SIZE_LOG2) + ty) + 0.5f;
+
+  // copy current image pixel to the first block
+  CurBlockLocal1[(ty << BLOCK_SIZE_LOG2) + tx] =
+      tex2D<float>(TexSrc, tex_x, tex_y);
+
+  // synchronize threads to make sure the block is copied
+  cg::sync(cta);
+
+  // calculate the multiplication of DCTv8matrix * A and place it in the second
+  // block
+  float curelem = 0;
+  int DCTv8matrixIndex = (ty << BLOCK_SIZE_LOG2) + 0;
+  int CurBlockLocal1Index = 0 * BLOCK_SIZE + tx;
+#pragma unroll
+
+  for (int i = 0; i < BLOCK_SIZE; i++) {
+    curelem +=
+        DCTv8matrix[DCTv8matrixIndex] * CurBlockLocal1[CurBlockLocal1Index];
+    DCTv8matrixIndex += 1;
+    CurBlockLocal1Index += BLOCK_SIZE;
+  }
+
+  CurBlockLocal2[(ty << BLOCK_SIZE_LOG2) + tx] = curelem;
+
+  // synchronize threads to make sure the first 2 matrices are multiplied and
+  // the result is stored in the second block
+  cg::sync(cta);
+
+  // calculate the multiplication of (DCTv8matrix * A) * DCTv8matrixT and place
+  // it in the first block
+  curelem = 0;
+  int CurBlockLocal2Index = (ty << BLOCK_SIZE_LOG2) + 0;
+  DCTv8matrixIndex = (tx << BLOCK_SIZE_LOG2) + 0;
+#pragma unroll
+
+  for (int i = 0; i < BLOCK_SIZE; i++) {
+    curelem +=
+        CurBlockLocal2[CurBlockLocal2Index] * DCTv8matrix[DCTv8matrixIndex];
+    CurBlockLocal2Index += 1;
+    DCTv8matrixIndex += 1;
+  }
+
+  CurBlockLocal1[(ty << BLOCK_SIZE_LOG2) + tx] = curelem;
+
+  // synchronize threads to make sure the matrices are multiplied and the result
+  // is stored back in the first block
+  cg::sync(cta);
+
+  // copy current coefficient to its place in the result array
+  Dst[FMUL(((by << BLOCK_SIZE_LOG2) + ty), ImgWidth) +
+      ((bx << BLOCK_SIZE_LOG2) + tx)] =
+      CurBlockLocal1[(ty << BLOCK_SIZE_LOG2) + tx];
+}

Samples/2_Concepts_and_Techniques/dct8x8/dct8x8_kernel2.cuh

@@ -0,0 +1,280 @@
+/* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *  * Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  * Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *  * Neither the name of NVIDIA CORPORATION nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+**************************************************************************
+* \file dct8x8_kernel2.cu
+* \brief Contains 2nd kernel implementations of DCT and IDCT routines, used in
+*        JPEG internal data processing. Optimized device code.
+*
+* This code implements traditional approach to forward and inverse Discrete
+* Cosine Transform to blocks of image pixels (of 8x8 size), as in JPEG standard.
+* The data processing is done using floating point representation.
+* The routine that performs quantization of coefficients can be found in
+* dct8x8_kernel_quantization.cu file.
+*/
+
+#pragma once
+
+#include <cooperative_groups.h>
+
+namespace cg = cooperative_groups;
+
+#include "Common.h"
+
+// Used in forward and inverse DCT
+#define C_a 1.387039845322148f  //!< a = (2^0.5) * cos(    pi / 16);
+#define C_b 1.306562964876377f  //!< b = (2^0.5) * cos(    pi /  8);
+#define C_c 1.175875602419359f  //!< c = (2^0.5) * cos(3 * pi / 16);
+#define C_d 0.785694958387102f  //!< d = (2^0.5) * cos(5 * pi / 16);
+#define C_e 0.541196100146197f  //!< e = (2^0.5) * cos(3 * pi /  8);
+#define C_f 0.275899379282943f  //!< f = (2^0.5) * cos(7 * pi / 16);
+
+/**
+*  Normalization constant that is used in forward and inverse DCT
+*/
+#define C_norm 0.3535533905932737f  // 1 / (8^0.5)
+
+/**
+*  Width of data block (2nd kernel)
+*/
+#define KER2_BLOCK_WIDTH 32
+
+/**
+*  Height of data block (2nd kernel)
+*/
+#define KER2_BLOCK_HEIGHT 16
+
+/**
+*  LOG2 of width of data block (2nd kernel)
+*/
+#define KER2_BW_LOG2 5
+
+/**
+*  LOG2 of height of data block (2nd kernel)
+*/
+#define KER2_BH_LOG2 4
+
+/**
+*  Stride of shared memory buffer (2nd kernel)
+*/
+#define KER2_SMEMBLOCK_STRIDE (KER2_BLOCK_WIDTH + 1)
+
+/**
+**************************************************************************
+*  Performs in-place DCT of vector of 8 elements.
+*
+* \param Vect0          [IN/OUT] - Pointer to the first element of vector
+* \param Step           [IN/OUT] - Value to add to ptr to access other elements
+*
+* \return None
+*/
+__device__ void CUDAsubroutineInplaceDCTvector(float *Vect0, int Step) {
+  float *Vect1 = Vect0 + Step;
+  float *Vect2 = Vect1 + Step;
+  float *Vect3 = Vect2 + Step;
+  float *Vect4 = Vect3 + Step;
+  float *Vect5 = Vect4 + Step;
+  float *Vect6 = Vect5 + Step;
+  float *Vect7 = Vect6 + Step;
+
+  float X07P = (*Vect0) + (*Vect7);
+  float X16P = (*Vect1) + (*Vect6);
+  float X25P = (*Vect2) + (*Vect5);
+  float X34P = (*Vect3) + (*Vect4);
+
+  float X07M = (*Vect0) - (*Vect7);
+  float X61M = (*Vect6) - (*Vect1);
+  float X25M = (*Vect2) - (*Vect5);
+  float X43M = (*Vect4) - (*Vect3);
+
+  float X07P34PP = X07P + X34P;
+  float X07P34PM = X07P - X34P;
+  float X16P25PP = X16P + X25P;
+  float X16P25PM = X16P - X25P;
+
+  (*Vect0) = C_norm * (X07P34PP + X16P25PP);
+  (*Vect2) = C_norm * (C_b * X07P34PM + C_e * X16P25PM);
+  (*Vect4) = C_norm * (X07P34PP - X16P25PP);
+  (*Vect6) = C_norm * (C_e * X07P34PM - C_b * X16P25PM);
+
+  (*Vect1) = C_norm * (C_a * X07M - C_c * X61M + C_d * X25M - C_f * X43M);
+  (*Vect3) = C_norm * (C_c * X07M + C_f * X61M - C_a * X25M + C_d * X43M);
+  (*Vect5) = C_norm * (C_d * X07M + C_a * X61M + C_f * X25M - C_c * X43M);
+  (*Vect7) = C_norm * (C_f * X07M + C_d * X61M + C_c * X25M + C_a * X43M);
+}
+
+/**
+**************************************************************************
+*  Performs in-place IDCT of vector of 8 elements.
+*
+* \param Vect0          [IN/OUT] - Pointer to the first element of vector
+* \param Step           [IN/OUT] - Value to add to ptr to access other elements
+*
+* \return None
+*/
+__device__ void CUDAsubroutineInplaceIDCTvector(float *Vect0, int Step) {
+  float *Vect1 = Vect0 + Step;
+  float *Vect2 = Vect1 + Step;
+  float *Vect3 = Vect2 + Step;
+  float *Vect4 = Vect3 + Step;
+  float *Vect5 = Vect4 + Step;
+  float *Vect6 = Vect5 + Step;
+  float *Vect7 = Vect6 + Step;
+
+  float Y04P = (*Vect0) + (*Vect4);
+  float Y2b6eP = C_b * (*Vect2) + C_e * (*Vect6);
+
+  float Y04P2b6ePP = Y04P + Y2b6eP;
+  float Y04P2b6ePM = Y04P - Y2b6eP;
+  float Y7f1aP3c5dPP =
+      C_f * (*Vect7) + C_a * (*Vect1) + C_c * (*Vect3) + C_d * (*Vect5);
+  float Y7a1fM3d5cMP =
+      C_a * (*Vect7) - C_f * (*Vect1) + C_d * (*Vect3) - C_c * (*Vect5);
+
+  float Y04M = (*Vect0) - (*Vect4);
+  float Y2e6bM = C_e * (*Vect2) - C_b * (*Vect6);
+
+  float Y04M2e6bMP = Y04M + Y2e6bM;
+  float Y04M2e6bMM = Y04M - Y2e6bM;
+  float Y1c7dM3f5aPM =
+      C_c * (*Vect1) - C_d * (*Vect7) - C_f * (*Vect3) - C_a * (*Vect5);
+  float Y1d7cP3a5fMM =
+      C_d * (*Vect1) + C_c * (*Vect7) - C_a * (*Vect3) + C_f * (*Vect5);
+
+  (*Vect0) = C_norm * (Y04P2b6ePP + Y7f1aP3c5dPP);
+  (*Vect7) = C_norm * (Y04P2b6ePP - Y7f1aP3c5dPP);
+  (*Vect4) = C_norm * (Y04P2b6ePM + Y7a1fM3d5cMP);
+  (*Vect3) = C_norm * (Y04P2b6ePM - Y7a1fM3d5cMP);
+
+  (*Vect1) = C_norm * (Y04M2e6bMP + Y1c7dM3f5aPM);
+  (*Vect5) = C_norm * (Y04M2e6bMM - Y1d7cP3a5fMM);
+  (*Vect2) = C_norm * (Y04M2e6bMM + Y1d7cP3a5fMM);
+  (*Vect6) = C_norm * (Y04M2e6bMP - Y1c7dM3f5aPM);
+}
+
+/**
+**************************************************************************
+*  Performs 8x8 block-wise Forward Discrete Cosine Transform of the given
+*  image plane and outputs result to the array of coefficients. 2nd
+*implementation.
+*  This kernel is designed to process image by blocks of blocks8x8 that
+*  utilizes maximum warps capacity, assuming that it is enough of 8 threads
+*  per block8x8.
+*
+* \param SrcDst                     [OUT] - Coefficients plane
+* \param ImgStride                  [IN] - Stride of SrcDst
+*
+* \return None
+*/
+
+__global__ void CUDAkernel2DCT(float *dst, float *src, int ImgStride) {
+  // Handle to thread block group
+  cg::thread_block cta = cg::this_thread_block();
+
+  __shared__ float block[KER2_BLOCK_HEIGHT * KER2_SMEMBLOCK_STRIDE];
+
+  int OffsThreadInRow = threadIdx.y * BLOCK_SIZE + threadIdx.x;
+  int OffsThreadInCol = threadIdx.z * BLOCK_SIZE;
+  src += FMUL(blockIdx.y * KER2_BLOCK_HEIGHT + OffsThreadInCol, ImgStride) +
+         blockIdx.x * KER2_BLOCK_WIDTH + OffsThreadInRow;
+  dst += FMUL(blockIdx.y * KER2_BLOCK_HEIGHT + OffsThreadInCol, ImgStride) +
+         blockIdx.x * KER2_BLOCK_WIDTH + OffsThreadInRow;
+  float *bl_ptr =
+      block + OffsThreadInCol * KER2_SMEMBLOCK_STRIDE + OffsThreadInRow;
+
+#pragma unroll
+
+  for (unsigned int i = 0; i < BLOCK_SIZE; i++)
+    bl_ptr[i * KER2_SMEMBLOCK_STRIDE] = src[i * ImgStride];
+
+  cg::sync(cta);
+  // process rows
+  CUDAsubroutineInplaceDCTvector(
+      block + (OffsThreadInCol + threadIdx.x) * KER2_SMEMBLOCK_STRIDE +
+          OffsThreadInRow - threadIdx.x,
+      1);
+
+  cg::sync(cta);
+  // process columns
+  CUDAsubroutineInplaceDCTvector(bl_ptr, KER2_SMEMBLOCK_STRIDE);
+
+  cg::sync(cta);
+  for (unsigned int i = 0; i < BLOCK_SIZE; i++)
+    dst[i * ImgStride] = bl_ptr[i * KER2_SMEMBLOCK_STRIDE];
+}
+
+/**
+**************************************************************************
+*  Performs 8x8 block-wise Inverse Discrete Cosine Transform of the given
+*  coefficients plane and outputs result to the image. 2nd implementation.
+*  This kernel is designed to process image by blocks of blocks8x8 that
+*  utilizes maximum warps capacity, assuming that it is enough of 8 threads
+*  per block8x8.
+*
+* \param SrcDst                     [OUT] - Coefficients plane
+* \param ImgStride                  [IN] - Stride of SrcDst
+*
+* \return None
+*/
+
+__global__ void CUDAkernel2IDCT(float *dst, float *src, int ImgStride) {
+  // Handle to thread block group
+  cg::thread_block cta = cg::this_thread_block();
+
+  __shared__ float block[KER2_BLOCK_HEIGHT * KER2_SMEMBLOCK_STRIDE];
+
+  int OffsThreadInRow = threadIdx.y * BLOCK_SIZE + threadIdx.x;
+  int OffsThreadInCol = threadIdx.z * BLOCK_SIZE;
+  src += FMUL(blockIdx.y * KER2_BLOCK_HEIGHT + OffsThreadInCol, ImgStride) +
+         blockIdx.x * KER2_BLOCK_WIDTH + OffsThreadInRow;
+  dst += FMUL(blockIdx.y * KER2_BLOCK_HEIGHT + OffsThreadInCol, ImgStride) +
+         blockIdx.x * KER2_BLOCK_WIDTH + OffsThreadInRow;
+  float *bl_ptr =
+      block + OffsThreadInCol * KER2_SMEMBLOCK_STRIDE + OffsThreadInRow;
+
+#pragma unroll
+
+  for (unsigned int i = 0; i < BLOCK_SIZE; i++)
+    bl_ptr[i * KER2_SMEMBLOCK_STRIDE] = src[i * ImgStride];
+
+  cg::sync(cta);
+  // process rows
+  CUDAsubroutineInplaceIDCTvector(
+      block + (OffsThreadInCol + threadIdx.x) * KER2_SMEMBLOCK_STRIDE +
+          OffsThreadInRow - threadIdx.x,
+      1);
+
+  cg::sync(cta);
+  // process columns
+  CUDAsubroutineInplaceIDCTvector(bl_ptr, KER2_SMEMBLOCK_STRIDE);
+
+  cg::sync(cta);
+
+  for (unsigned int i = 0; i < BLOCK_SIZE; i++)
+    dst[i * ImgStride] = bl_ptr[i * KER2_SMEMBLOCK_STRIDE];
+}

Samples/2_Concepts_and_Techniques/dct8x8/dct8x8_kernel_quantization.cuh

@@ -0,0 +1,132 @@
+/* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *  * Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  * Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *  * Neither the name of NVIDIA CORPORATION nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+**************************************************************************
+* \file dct8x8_kernel_quantization.cu
+* \brief Contains unoptimized quantization routines. Device code.
+*
+* This code implements CUDA versions of quantization of Discrete Cosine
+* Transform coefficients with 8x8 blocks for float and short arrays.
+*/
+
+#pragma once
+#include <cooperative_groups.h>
+
+namespace cg = cooperative_groups;
+#include "Common.h"
+
+/**
+*  JPEG quality=0_of_12 quantization matrix
+*/
+__constant__ short Q[] = {
+  32,  33,  51,  81,  66,  39,  34,  17,
+  33,  36,  48,  47,  28,  23,  12,  12,
+  51,  48,  47,  28,  23,  12,  12,  12,
+  81,  47,  28,  23,  12,  12,  12,  12,
+  66,  28,  23,  12,  12,  12,  12,  12,
+  39,  23,  12,  12,  12,  12,  12,  12,
+  34,  12,  12,  12,  12,  12,  12,  12,
+  17,  12,  12,  12,  12,  12,  12,  12
+};
+
+/**
+**************************************************************************
+*  Performs in-place quantization of given DCT coefficients plane using
+*  predefined quantization matrices (for floats plane). Unoptimized.
+*
+* \param SrcDst         [IN/OUT] - DCT coefficients plane
+* \param Stride         [IN] - Stride of SrcDst
+*
+* \return None
+*/
+__global__ void CUDAkernelQuantizationFloat(float *SrcDst, int Stride) {
+  // Block index
+  int bx = blockIdx.x;
+  int by = blockIdx.y;
+
+  // Thread index (current coefficient)
+  int tx = threadIdx.x;
+  int ty = threadIdx.y;
+
+  // copy current coefficient to the local variable
+  float curCoef =
+      SrcDst[(by * BLOCK_SIZE + ty) * Stride + (bx * BLOCK_SIZE + tx)];
+  float curQuant = (float)Q[ty * BLOCK_SIZE + tx];
+
+  // quantize the current coefficient
+  float quantized = roundf(curCoef / curQuant);
+  curCoef = quantized * curQuant;
+
+  // copy quantized coefficient back to the DCT-plane
+  SrcDst[(by * BLOCK_SIZE + ty) * Stride + (bx * BLOCK_SIZE + tx)] = curCoef;
+}
+
+/**
+**************************************************************************
+*  Performs in-place quantization of given DCT coefficients plane using
+*  predefined quantization matrices (for shorts plane). Unoptimized.
+*
+* \param SrcDst         [IN/OUT] - DCT coefficients plane
+* \param Stride         [IN] - Stride of SrcDst
+*
+* \return None
+*/
+__global__ void CUDAkernelQuantizationShort(short *SrcDst, int Stride) {
+  // Handle to thread block group
+  cg::thread_block cta = cg::this_thread_block();
+  // Block index
+  int bx = blockIdx.x;
+  int by = blockIdx.y;
+
+  // Thread index (current coefficient)
+  int tx = threadIdx.x;
+  int ty = threadIdx.y;
+
+  // copy current coefficient to the local variable
+  short curCoef =
+      SrcDst[(by * BLOCK_SIZE + ty) * Stride + (bx * BLOCK_SIZE + tx)];
+  short curQuant = Q[ty * BLOCK_SIZE + tx];
+
+  // quantize the current coefficient
+  if (curCoef < 0) {
+    curCoef = -curCoef;
+    curCoef += curQuant >> 1;
+    curCoef /= curQuant;
+    curCoef = -curCoef;
+  } else {
+    curCoef += curQuant >> 1;
+    curCoef /= curQuant;
+  }
+
+  cg::sync(cta);
+
+  curCoef = curCoef * curQuant;
+
+  // copy quantized coefficient back to the DCT-plane
+  SrcDst[(by * BLOCK_SIZE + ty) * Stride + (bx * BLOCK_SIZE + tx)] = curCoef;
+}

Samples/2_Concepts_and_Techniques/dct8x8/dct8x8_kernel_short.cuh

@@ -0,0 +1,544 @@
+/* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *  * Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  * Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *  * Neither the name of NVIDIA CORPORATION nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+**************************************************************************
+* \file dct8x8_kernel_short.cu
+* \brief Contains kernel implementations of DCT and IDCT routines for 16-bit
+*        integers, used in JPEG internal data processing. Optimized device code.
+*
+* This code implements traditional approach to forward and inverse Discrete
+* Cosine Transform to blocks of image pixels (of 8x8 size), as in JPEG standard.
+* The data processing is performed using short data type.
+* The routine that performs quantization of coefficients can be found in
+* dct8x8_kernel_quantization.cu file.
+*/
+
+#pragma once
+
+#include <cooperative_groups.h>
+
+namespace cg = cooperative_groups;
+#include "Common.h"
+
+/**
+*  Width of data block (short kernel)
+*/
+#define KERS_BLOCK_WIDTH 32
+
+/**
+*  Height of data block (short kernel)
+*/
+#define KERS_BLOCK_HEIGHT 32
+
+/**
+*  LOG2 of width of data block (short kernel)
+*/
+#define KERS_BW_LOG2 5
+
+/**
+*  LOG2 of height of data block (short kernel)
+*/
+#define KERS_BH_LOG2 5
+
+/**
+*  Stride of shared memory buffer (short kernel)
+*/
+#define KERS_SMEMBLOCK_STRIDE (KERS_BLOCK_WIDTH + 2)
+
+/**
+*  Half of data block width (short kernel)
+*/
+#define KERS_BLOCK_WIDTH_HALF (KERS_BLOCK_WIDTH / 2)
+
+#define SIN_1_4 0x5A82
+#define COS_1_4 0x5A82
+#define SIN_1_8 0x30FC
+#define COS_1_8 0x7642
+
+#define OSIN_1_16 0x063E
+#define OSIN_3_16 0x11C7
+#define OSIN_5_16 0x1A9B
+#define OSIN_7_16 0x1F63
+
+#define OCOS_1_16 0x1F63
+#define OCOS_3_16 0x1A9B
+#define OCOS_5_16 0x11C7
+#define OCOS_7_16 0x063E
+
+/**
+*  Package of 2 shorts into 1 int - designed to perform i/o by integers to avoid
+* bank conflicts
+*/
+union PackedShorts {
+  struct __align__(8) {
+    short hShort1;
+    short hShort2;
+  };
+  unsigned int hInt;
+};
+
+/**
+*  Converts fixed point value to short value
+*/
+__device__ inline short unfixh(int x) { return (short)((x + 0x8000) >> 16); }
+
+/**
+*  Converts fixed point value to short value
+*/
+__device__ inline int unfixo(int x) { return (x + 0x1000) >> 13; }
+
+/**
+**************************************************************************
+*  Performs in-place DCT of vector of 8 elements (used to access columns in
+*shared memory).
+*
+* \param SrcDst         [IN/OUT] - Pointer to the first element of vector
+* \param Stride         [IN] - Value to add to ptr to access other elements
+*
+* \return None
+*/
+__device__ void CUDAshortInplaceDCT(short *SrcDst, int Stride) {
+  int in0, in1, in2, in3, in4, in5, in6, in7;
+  int tmp0, tmp1, tmp2, tmp3, tmp4, tmp5, tmp6, tmp7;
+  int tmp10, tmp11, tmp12, tmp13;
+  int tmp14, tmp15, tmp16, tmp17;
+  int tmp25, tmp26;
+
+  int DoubleStride = Stride << 1;
+
+  short *DstPtr = SrcDst;
+  in0 = *DstPtr;
+  DstPtr += Stride;
+  in1 = *DstPtr;
+  DstPtr += Stride;
+  in2 = *DstPtr;
+  DstPtr += Stride;
+  in3 = *DstPtr;
+  DstPtr += Stride;
+  in4 = *DstPtr;
+  DstPtr += Stride;
+  in5 = *DstPtr;
+  DstPtr += Stride;
+  in6 = *DstPtr;
+  DstPtr += Stride;
+  in7 = *DstPtr;
+
+  tmp0 = in7 + in0;
+  tmp1 = in6 + in1;
+  tmp2 = in5 + in2;
+  tmp3 = in4 + in3;
+  tmp4 = in3 - in4;
+  tmp5 = in2 - in5;
+  tmp6 = in1 - in6;
+  tmp7 = in0 - in7;
+
+  tmp10 = tmp3 + tmp0;
+  tmp11 = tmp2 + tmp1;
+  tmp12 = tmp1 - tmp2;
+  tmp13 = tmp0 - tmp3;
+
+  tmp16 = unfixo(FMUL(tmp6 + tmp5, SIN_1_4));
+  tmp15 = unfixo(FMUL(tmp6 - tmp5, COS_1_4));
+
+  tmp4 <<= 2;
+  tmp7 <<= 2;
+
+  tmp14 = tmp4 + tmp15;
+  tmp25 = tmp4 - tmp15;
+  tmp26 = tmp7 - tmp16;
+  tmp17 = tmp7 + tmp16;
+
+  DstPtr = SrcDst;
+  *DstPtr = unfixh(FMUL(tmp10 + tmp11, SIN_1_4));
+  DstPtr += DoubleStride;
+  *DstPtr = unfixh(FMUL(tmp13, COS_1_8) + FMUL(tmp12, SIN_1_8));
+  DstPtr += DoubleStride;
+  *DstPtr = unfixh(FMUL(tmp10 - tmp11, COS_1_4));
+  DstPtr += DoubleStride;
+  *DstPtr = unfixh(FMUL(tmp13, SIN_1_8) - FMUL(tmp12, COS_1_8));
+
+  DstPtr = SrcDst + Stride;
+  *DstPtr = unfixh(FMUL(tmp17, OCOS_1_16) + FMUL(tmp14, OSIN_1_16));
+  DstPtr += DoubleStride;
+  *DstPtr = unfixh(FMUL(tmp26, OCOS_3_16) - FMUL(tmp25, OSIN_3_16));
+  DstPtr += DoubleStride;
+  *DstPtr = unfixh(FMUL(tmp26, OCOS_5_16) + FMUL(tmp25, OSIN_5_16));
+  DstPtr += DoubleStride;
+  *DstPtr = unfixh(FMUL(tmp17, OCOS_7_16) - FMUL(tmp14, OSIN_7_16));
+}
+
+/**
+**************************************************************************
+*  Performs in-place DCT of vector of 8 elements (used to access rows in shared
+*memory).
+*
+* \param V8         [IN/OUT] - Pointer to the first two elements of vector
+*
+* \return None
+*/
+__device__ void CUDAshortInplaceDCT(unsigned int *V8) {
+  int in0, in1, in2, in3, in4, in5, in6, in7;
+  int tmp0, tmp1, tmp2, tmp3, tmp4, tmp5, tmp6, tmp7;
+  int tmp10, tmp11, tmp12, tmp13;
+  int tmp14, tmp15, tmp16, tmp17;
+  int tmp25, tmp26;
+  PackedShorts sh0, sh1, sh2, sh3;
+
+  sh0.hInt = V8[0];
+  sh1.hInt = V8[1];
+  sh2.hInt = V8[2];
+  sh3.hInt = V8[3];
+  in0 = sh0.hShort1;
+  in1 = sh0.hShort2;
+  in2 = sh1.hShort1;
+  in3 = sh1.hShort2;
+  in4 = sh2.hShort1;
+  in5 = sh2.hShort2;
+  in6 = sh3.hShort1;
+  in7 = sh3.hShort2;
+
+  tmp0 = in7 + in0;
+  tmp1 = in6 + in1;
+  tmp2 = in5 + in2;
+  tmp3 = in4 + in3;
+  tmp4 = in3 - in4;
+  tmp5 = in2 - in5;
+  tmp6 = in1 - in6;
+  tmp7 = in0 - in7;
+
+  tmp10 = tmp3 + tmp0;
+  tmp11 = tmp2 + tmp1;
+  tmp12 = tmp1 - tmp2;
+  tmp13 = tmp0 - tmp3;
+
+  sh0.hShort1 = unfixh(FMUL(tmp10 + tmp11, SIN_1_4));
+  sh2.hShort1 = unfixh(FMUL(tmp10 - tmp11, COS_1_4));
+
+  sh1.hShort1 = unfixh(FMUL(tmp13, COS_1_8) + FMUL(tmp12, SIN_1_8));
+  sh3.hShort1 = unfixh(FMUL(tmp13, SIN_1_8) - FMUL(tmp12, COS_1_8));
+
+  tmp16 = unfixo(FMUL(tmp6 + tmp5, SIN_1_4));
+  tmp15 = unfixo(FMUL(tmp6 - tmp5, COS_1_4));
+
+  tmp4 <<= 2;
+  tmp7 <<= 2;
+
+  tmp14 = tmp4 + tmp15;
+  tmp25 = tmp4 - tmp15;
+  tmp26 = tmp7 - tmp16;
+  tmp17 = tmp7 + tmp16;
+
+  sh0.hShort2 = unfixh(FMUL(tmp17, OCOS_1_16) + FMUL(tmp14, OSIN_1_16));
+  sh3.hShort2 = unfixh(FMUL(tmp17, OCOS_7_16) - FMUL(tmp14, OSIN_7_16));
+  sh2.hShort2 = unfixh(FMUL(tmp26, OCOS_5_16) + FMUL(tmp25, OSIN_5_16));
+  sh1.hShort2 = unfixh(FMUL(tmp26, OCOS_3_16) - FMUL(tmp25, OSIN_3_16));
+
+  V8[0] = sh0.hInt;
+  V8[1] = sh1.hInt;
+  V8[2] = sh2.hInt;
+  V8[3] = sh3.hInt;
+}
+
+/**
+**************************************************************************
+*  Performs in-place IDCT of vector of 8 elements (used to access columns in
+*shared memory).
+*
+* \param SrcDst         [IN/OUT] - Pointer to the first element of vector
+* \param Stride         [IN] - Value to add to ptr to access other elements
+*
+* \return None
+*/
+__device__ void CUDAshortInplaceIDCT(short *SrcDst, int Stride) {
+  int in0, in1, in2, in3, in4, in5, in6, in7;
+  int tmp10, tmp11, tmp12, tmp13;
+  int tmp20, tmp21, tmp22, tmp23;
+  int tmp30, tmp31;
+  int tmp40, tmp41, tmp42, tmp43;
+  int tmp50, tmp51, tmp52, tmp53;
+
+  short *DstPtr = SrcDst;
+  in0 = *DstPtr;
+  DstPtr += Stride;
+  in1 = *DstPtr;
+  DstPtr += Stride;
+  in2 = *DstPtr;
+  DstPtr += Stride;
+  in3 = *DstPtr;
+  DstPtr += Stride;
+  in4 = *DstPtr;
+  DstPtr += Stride;
+  in5 = *DstPtr;
+  DstPtr += Stride;
+  in6 = *DstPtr;
+  DstPtr += Stride;
+  in7 = *DstPtr;
+
+  tmp10 = FMUL(in0 + in4, COS_1_4);
+  tmp11 = FMUL(in0 - in4, COS_1_4);
+  tmp12 = FMUL(in2, SIN_1_8) - FMUL(in6, COS_1_8);
+  tmp13 = FMUL(in6, SIN_1_8) + FMUL(in2, COS_1_8);
+
+  tmp20 = tmp10 + tmp13;
+  tmp21 = tmp11 + tmp12;
+  tmp22 = tmp11 - tmp12;
+  tmp23 = tmp10 - tmp13;
+
+  tmp30 = unfixo(FMUL(in3 + in5, COS_1_4));
+  tmp31 = unfixo(FMUL(in3 - in5, COS_1_4));
+
+  in1 <<= 2;
+  in7 <<= 2;
+
+  tmp40 = in1 + tmp30;
+  tmp41 = in7 + tmp31;
+  tmp42 = in1 - tmp30;
+  tmp43 = in7 - tmp31;
+
+  tmp50 = FMUL(tmp40, OCOS_1_16) + FMUL(tmp41, OSIN_1_16);
+  tmp51 = FMUL(tmp40, OSIN_1_16) - FMUL(tmp41, OCOS_1_16);
+  tmp52 = FMUL(tmp42, OCOS_5_16) + FMUL(tmp43, OSIN_5_16);
+  tmp53 = FMUL(tmp42, OSIN_5_16) - FMUL(tmp43, OCOS_5_16);
+
+  DstPtr = SrcDst;
+  *DstPtr = unfixh(tmp20 + tmp50);
+  DstPtr += Stride;
+  *DstPtr = unfixh(tmp21 + tmp53);
+  DstPtr += Stride;
+  *DstPtr = unfixh(tmp22 + tmp52);
+  DstPtr += Stride;
+  *DstPtr = unfixh(tmp23 + tmp51);
+  DstPtr += Stride;
+  *DstPtr = unfixh(tmp23 - tmp51);
+  DstPtr += Stride;
+  *DstPtr = unfixh(tmp22 - tmp52);
+  DstPtr += Stride;
+  *DstPtr = unfixh(tmp21 - tmp53);
+  DstPtr += Stride;
+  *DstPtr = unfixh(tmp20 - tmp50);
+}
+
+/**
+**************************************************************************
+*  Performs in-place IDCT of vector of 8 elements (used to access rows in shared
+*memory).
+*
+* \param V8         [IN/OUT] - Pointer to the first two elements of vector
+*
+* \return None
+*/
+__device__ void CUDAshortInplaceIDCT(unsigned int *V8) {
+  int in0, in1, in2, in3, in4, in5, in6, in7;
+  int tmp10, tmp11, tmp12, tmp13;
+  int tmp20, tmp21, tmp22, tmp23;
+  int tmp30, tmp31;
+  int tmp40, tmp41, tmp42, tmp43;
+  int tmp50, tmp51, tmp52, tmp53;
+  PackedShorts sh0, sh1, sh2, sh3;
+
+  sh0.hInt = V8[0];
+  sh1.hInt = V8[1];
+  sh2.hInt = V8[2];
+  sh3.hInt = V8[3];
+  in0 = sh0.hShort1;
+  in1 = sh0.hShort2;
+  in2 = sh1.hShort1;
+  in3 = sh1.hShort2;
+  in4 = sh2.hShort1;
+  in5 = sh2.hShort2;
+  in6 = sh3.hShort1;
+  in7 = sh3.hShort2;
+
+  tmp10 = FMUL(in0 + in4, COS_1_4);
+  tmp11 = FMUL(in0 - in4, COS_1_4);
+  tmp12 = FMUL(in2, SIN_1_8) - FMUL(in6, COS_1_8);
+  tmp13 = FMUL(in6, SIN_1_8) + FMUL(in2, COS_1_8);
+
+  tmp20 = tmp10 + tmp13;
+  tmp21 = tmp11 + tmp12;
+  tmp22 = tmp11 - tmp12;
+  tmp23 = tmp10 - tmp13;
+
+  tmp30 = unfixo(FMUL(in3 + in5, COS_1_4));
+  tmp31 = unfixo(FMUL(in3 - in5, COS_1_4));
+
+  in1 <<= 2;
+  in7 <<= 2;
+
+  tmp40 = in1 + tmp30;
+  tmp41 = in7 + tmp31;
+  tmp42 = in1 - tmp30;
+  tmp43 = in7 - tmp31;
+
+  tmp50 = FMUL(tmp40, OCOS_1_16) + FMUL(tmp41, OSIN_1_16);
+  tmp51 = FMUL(tmp40, OSIN_1_16) - FMUL(tmp41, OCOS_1_16);
+  tmp52 = FMUL(tmp42, OCOS_5_16) + FMUL(tmp43, OSIN_5_16);
+  tmp53 = FMUL(tmp42, OSIN_5_16) - FMUL(tmp43, OCOS_5_16);
+
+  sh0.hShort1 = unfixh(tmp20 + tmp50);
+  sh0.hShort2 = unfixh(tmp21 + tmp53);
+  sh1.hShort1 = unfixh(tmp22 + tmp52);
+  sh1.hShort2 = unfixh(tmp23 + tmp51);
+  sh2.hShort1 = unfixh(tmp23 - tmp51);
+  sh2.hShort2 = unfixh(tmp22 - tmp52);
+  sh3.hShort1 = unfixh(tmp21 - tmp53);
+  sh3.hShort2 = unfixh(tmp20 - tmp50);
+
+  V8[0] = sh0.hInt;
+  V8[1] = sh1.hInt;
+  V8[2] = sh2.hInt;
+  V8[3] = sh3.hInt;
+}
+
+/**
+**************************************************************************
+*  Performs 8x8 block-wise Forward Discrete Cosine Transform of the given
+*  image plane and outputs result to the array of coefficients. Short
+*implementation.
+*  This kernel is designed to process image by blocks of blocks8x8 that
+*  utilize maximum warps capacity, assuming that it is enough of 8 threads
+*  per block8x8.
+*
+* \param SrcDst                     [OUT] - Coefficients plane
+* \param ImgStride                  [IN] - Stride of SrcDst
+*
+* \return None
+*/
+
+#define IMAD(a, b, c) (((a) * (b)) + (c))
+#define IMUL(a, b) ((a) * (b))
+
+__global__ void CUDAkernelShortDCT(short *SrcDst, int ImgStride) {
+  // Handle to thread block group
+  cg::thread_block cta = cg::this_thread_block();
+  __shared__ short block[KERS_BLOCK_HEIGHT * KERS_SMEMBLOCK_STRIDE];
+  int OffsThreadInRow = FMUL(threadIdx.y, BLOCK_SIZE) + threadIdx.x;
+  int OffsThreadInCol = FMUL(threadIdx.z, BLOCK_SIZE);
+  int OffsThrRowPermuted =
+      (OffsThreadInRow & 0xFFFFFFE0) |
+      ((OffsThreadInRow << 1) | (OffsThreadInRow >> 4) & 0x1) & 0x1F;
+
+  SrcDst +=
+      IMAD(IMAD(blockIdx.y, KERS_BLOCK_HEIGHT, OffsThreadInCol), ImgStride,
+           IMAD(blockIdx.x, KERS_BLOCK_WIDTH, OffsThreadInRow * 2));
+  short *bl_ptr =
+      block + IMAD(OffsThreadInCol, KERS_SMEMBLOCK_STRIDE, OffsThreadInRow * 2);
+
+  // load data to shared memory (only first half of threads in each row performs
+  // data moving (each thread moves 2 shorts)
+  if (OffsThreadInRow < KERS_BLOCK_WIDTH_HALF) {
+#pragma unroll
+
+    for (int i = 0; i < BLOCK_SIZE; i++)
+      ((int *)bl_ptr)[i * (KERS_SMEMBLOCK_STRIDE / 2)] =
+          ((int *)SrcDst)[i * (ImgStride / 2)];
+  }
+
+  cg::sync(cta);
+  CUDAshortInplaceDCT(
+      block + OffsThreadInCol * KERS_SMEMBLOCK_STRIDE + OffsThrRowPermuted,
+      KERS_SMEMBLOCK_STRIDE);
+  cg::sync(cta);
+  CUDAshortInplaceDCT((unsigned int *)(block +
+                                       OffsThreadInRow * KERS_SMEMBLOCK_STRIDE +
+                                       OffsThreadInCol));
+  cg::sync(cta);
+
+  // store data to global memory (only first half of threads in each row
+  // performs data moving (each thread moves 2 shorts)
+  if (OffsThreadInRow < KERS_BLOCK_WIDTH_HALF) {
+#pragma unroll
+
+    for (int i = 0; i < BLOCK_SIZE; i++)
+      ((int *)SrcDst)[i * (ImgStride / 2)] =
+          ((int *)bl_ptr)[i * (KERS_SMEMBLOCK_STRIDE / 2)];
+  }
+}
+
+/**
+**************************************************************************
+*  Performs 8x8 block-wise Inverse Discrete Cosine Transform of the given
+*  image plane and outputs result to the array of coefficients. Short
+*implementation.
+*  This kernel is designed to process image by blocks of blocks8x8 that
+*  utilize maximum warps capacity, assuming that it is enough of 8 threads
+*  per block8x8.
+*
+* \param SrcDst                     [OUT] - Coefficients plane
+* \param ImgStride                  [IN] - Stride of SrcDst
+*
+* \return None
+*/
+
+__global__ void CUDAkernelShortIDCT(short *SrcDst, int ImgStride) {
+  // Handle to thread block group
+  cg::thread_block cta = cg::this_thread_block();
+  __shared__ short block[KERS_BLOCK_HEIGHT * KERS_SMEMBLOCK_STRIDE];
+
+  int OffsThreadInRow = IMAD(threadIdx.y, BLOCK_SIZE, threadIdx.x);
+  int OffsThreadInCol = IMUL(threadIdx.z, BLOCK_SIZE);
+  int OffsThrRowPermuted =
+      (OffsThreadInRow & 0xFFFFFFE0) |
+      ((OffsThreadInRow << 1) | (OffsThreadInRow >> 4) & 0x1) & 0x1F;
+
+  SrcDst +=
+      IMAD(IMAD(blockIdx.y, KERS_BLOCK_HEIGHT, OffsThreadInCol), ImgStride,
+           IMAD(blockIdx.x, KERS_BLOCK_WIDTH, OffsThreadInRow * 2));
+  short *bl_ptr =
+      block + IMAD(OffsThreadInCol, KERS_SMEMBLOCK_STRIDE, OffsThreadInRow * 2);
+
+  // load data to shared memory (only first half of threads in each row performs
+  // data moving (each thread moves 2 shorts)
+  if (OffsThreadInRow < KERS_BLOCK_WIDTH_HALF) {
+#pragma unroll
+
+    for (int i = 0; i < BLOCK_SIZE; i++)
+      ((int *)bl_ptr)[i * (KERS_SMEMBLOCK_STRIDE / 2)] =
+          ((int *)SrcDst)[i * (ImgStride / 2)];
+  }
+
+  cg::sync(cta);
+  CUDAshortInplaceIDCT(
+      block + OffsThreadInCol * KERS_SMEMBLOCK_STRIDE + OffsThrRowPermuted,
+      KERS_SMEMBLOCK_STRIDE);
+  cg::sync(cta);
+  CUDAshortInplaceIDCT(
+      (unsigned int *)(block + OffsThreadInRow * KERS_SMEMBLOCK_STRIDE +
+                       OffsThreadInCol));
+  cg::sync(cta);
+
+  // store data to global memory (only first half of threads in each row
+  // performs data moving (each thread moves 2 shorts)
+  if (OffsThreadInRow < KERS_BLOCK_WIDTH_HALF) {
+#pragma unroll
+
+    for (int i = 0; i < BLOCK_SIZE; i++)
+      ((int *)SrcDst)[i * (ImgStride / 2)] =
+          ((int *)bl_ptr)[i * (KERS_SMEMBLOCK_STRIDE / 2)];
+  }
+}

Samples/2_Concepts_and_Techniques/dct8x8/dct8x8_vs2017.sln

@@ -0,0 +1,20 @@
+
+Microsoft Visual Studio Solution File, Format Version 12.00
+# Visual Studio 2017
+Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "dct8x8", "dct8x8_vs2017.vcxproj", "{997E0757-EA74-4A4E-A0FC-47D8C8831A15}"
+EndProject
+Global
+	GlobalSection(SolutionConfigurationPlatforms) = preSolution
+		Debug|x64 = Debug|x64
+		Release|x64 = Release|x64
+	EndGlobalSection
+	GlobalSection(ProjectConfigurationPlatforms) = postSolution
+		{997E0757-EA74-4A4E-A0FC-47D8C8831A15}.Debug|x64.ActiveCfg = Debug|x64
+		{997E0757-EA74-4A4E-A0FC-47D8C8831A15}.Debug|x64.Build.0 = Debug|x64
+		{997E0757-EA74-4A4E-A0FC-47D8C8831A15}.Release|x64.ActiveCfg = Release|x64
+		{997E0757-EA74-4A4E-A0FC-47D8C8831A15}.Release|x64.Build.0 = Release|x64
+	EndGlobalSection
+	GlobalSection(SolutionProperties) = preSolution
+		HideSolutionNode = FALSE
+	EndGlobalSection
+EndGlobal

Samples/2_Concepts_and_Techniques/dct8x8/dct8x8_vs2017.vcxproj

@@ -0,0 +1,120 @@
+<?xml version="1.0" encoding="utf-8"?>
+<Project DefaultTargets="Build" ToolsVersion="4.0" xmlns="http://schemas.microsoft.com/developer/msbuild/2003">
+  <PropertyGroup>
+    <CUDAPropsPath Condition="'$(CUDAPropsPath)'==''">$(VCTargetsPath)\BuildCustomizations</CUDAPropsPath>
+  </PropertyGroup>
+  <ItemGroup Label="ProjectConfigurations">
+    <ProjectConfiguration Include="Debug|x64">
+      <Configuration>Debug</Configuration>
+      <Platform>x64</Platform>
+    </ProjectConfiguration>
+    <ProjectConfiguration Include="Release|x64">
+      <Configuration>Release</Configuration>
+      <Platform>x64</Platform>
+    </ProjectConfiguration>
+  </ItemGroup>
+  <PropertyGroup Label="Globals">
+    <ProjectGuid>{997E0757-EA74-4A4E-A0FC-47D8C8831A15}</ProjectGuid>
+    <RootNamespace>dct8x8_vs2017</RootNamespace>
+    <ProjectName>dct8x8</ProjectName>
+    <CudaToolkitCustomDir />
+  </PropertyGroup>
+  <PropertyGroup Condition="'$(WindowsTargetPlatformVersion)'==''">
+    <LatestTargetPlatformVersion>$([Microsoft.Build.Utilities.ToolLocationHelper]::GetLatestSDKTargetPlatformVersion('Windows', '10.0'))</LatestTargetPlatformVersion>
+    <WindowsTargetPlatformVersion Condition="'$(WindowsTargetPlatformVersion)' == ''">$(LatestTargetPlatformVersion)</WindowsTargetPlatformVersion>
+    <TargetPlatformVersion>$(WindowsTargetPlatformVersion)</TargetPlatformVersion>
+  </PropertyGroup>
+  <Import Project="$(VCTargetsPath)\Microsoft.Cpp.Default.props" />
+  <PropertyGroup>
+    <ConfigurationType>Application</ConfigurationType>
+    <CharacterSet>MultiByte</CharacterSet>
+    <PlatformToolset>v141</PlatformToolset>
+  </PropertyGroup>
+  <PropertyGroup Condition="'$(Configuration)'=='Debug'">
+    <UseDebugLibraries>true</UseDebugLibraries>
+  </PropertyGroup>
+  <PropertyGroup Condition="'$(Configuration)'=='Release'">
+    <WholeProgramOptimization>true</WholeProgramOptimization>
+  </PropertyGroup>
+  <Import Project="$(VCTargetsPath)\Microsoft.Cpp.props" />
+  <ImportGroup Label="ExtensionSettings">
+    <Import Project="$(CUDAPropsPath)\CUDA 11.6.props" />
+  </ImportGroup>
+  <ImportGroup Label="PropertySheets">
+    <Import Condition="exists('$(UserRootDir)\Microsoft.Cpp.$(Platform).user.props')" Label="LocalAppDataPlatform" Project="$(UserRootDir)\Microsoft.Cpp.$(Platform).user.props" />
+  </ImportGroup>
+  <PropertyGroup Label="UserMacros" />
+  <PropertyGroup>
+    <IntDir>$(Platform)/$(Configuration)/</IntDir>
+    <IncludePath>$(IncludePath)</IncludePath>
+    <CodeAnalysisRuleSet>AllRules.ruleset</CodeAnalysisRuleSet>
+    <CodeAnalysisRules />
+    <CodeAnalysisRuleAssemblies />
+  </PropertyGroup>
+  <PropertyGroup Condition="'$(Platform)'=='x64'">
+    <OutDir>../../../bin/win64/$(Configuration)/</OutDir>
+  </PropertyGroup>
+  <ItemDefinitionGroup>
+    <ClCompile>
+      <WarningLevel>Level3</WarningLevel>
+      <PreprocessorDefinitions>WIN32;_MBCS;%(PreprocessorDefinitions)</PreprocessorDefinitions>
+      <AdditionalIncludeDirectories>./;$(CudaToolkitDir)/include;../../../Common;</AdditionalIncludeDirectories>
+    </ClCompile>
+    <Link>
+      <SubSystem>Console</SubSystem>
+      <AdditionalDependencies>cudart_static.lib;kernel32.lib;user32.lib;gdi32.lib;winspool.lib;comdlg32.lib;advapi32.lib;shell32.lib;ole32.lib;oleaut32.lib;uuid.lib;odbc32.lib;odbccp32.lib;%(AdditionalDependencies)</AdditionalDependencies>
+      <AdditionalLibraryDirectories>$(CudaToolkitLibDir);</AdditionalLibraryDirectories>
+      <OutputFile>$(OutDir)/dct8x8.exe</OutputFile>
+    </Link>
+    <CudaCompile>
+      <CodeGeneration>compute_35,sm_35;compute_37,sm_37;compute_50,sm_50;compute_52,sm_52;compute_60,sm_60;compute_61,sm_61;compute_70,sm_70;compute_75,sm_75;compute_80,sm_80;compute_86,sm_86;</CodeGeneration>
+      <AdditionalOptions>-Xcompiler "/wd 4819"  --threads 0 </AdditionalOptions>
+      <Include>./;../../../Common</Include>
+      <Defines>WIN32</Defines>
+    </CudaCompile>
+  </ItemDefinitionGroup>
+  <ItemDefinitionGroup Condition="'$(Configuration)'=='Debug'">
+    <ClCompile>
+      <Optimization>Disabled</Optimization>
+      <RuntimeLibrary>MultiThreadedDebug</RuntimeLibrary>
+    </ClCompile>
+    <Link>
+      <GenerateDebugInformation>true</GenerateDebugInformation>
+      <LinkTimeCodeGeneration>Default</LinkTimeCodeGeneration>
+    </Link>
+    <CudaCompile>
+      <Runtime>MTd</Runtime>
+      <TargetMachinePlatform>64</TargetMachinePlatform>
+    </CudaCompile>
+  </ItemDefinitionGroup>
+  <ItemDefinitionGroup Condition="'$(Configuration)'=='Release'">
+    <ClCompile>
+      <Optimization>MaxSpeed</Optimization>
+      <RuntimeLibrary>MultiThreaded</RuntimeLibrary>
+    </ClCompile>
+    <Link>
+      <GenerateDebugInformation>false</GenerateDebugInformation>
+      <LinkTimeCodeGeneration>UseLinkTimeCodeGeneration</LinkTimeCodeGeneration>
+    </Link>
+    <CudaCompile>
+      <Runtime>MT</Runtime>
+      <TargetMachinePlatform>64</TargetMachinePlatform>
+    </CudaCompile>
+  </ItemDefinitionGroup>
+  <ItemGroup>
+    <ClCompile Include="BmpUtil.cpp" />
+    <ClCompile Include="DCT8x8_Gold.cpp" />
+    <CudaCompile Include="dct8x8.cu" />
+    <ClInclude Include="BmpUtil.h" />
+    <ClInclude Include="Common.h" />
+    <ClInclude Include="DCT8x8_Gold.h" />
+    <None Include="dct8x8_kernel1.cuh" />
+    <None Include="dct8x8_kernel2.cuh" />
+    <None Include="dct8x8_kernel_quantization.cuh" />
+    <None Include="dct8x8_kernel_short.cuh" />
+  </ItemGroup>
+  <Import Project="$(VCTargetsPath)\Microsoft.Cpp.targets" />
+  <ImportGroup Label="ExtensionTargets">
+    <Import Project="$(CUDAPropsPath)\CUDA 11.6.targets" />
+  </ImportGroup>
+</Project>

Samples/2_Concepts_and_Techniques/dct8x8/dct8x8_vs2019.sln

@@ -0,0 +1,20 @@
+
+Microsoft Visual Studio Solution File, Format Version 12.00
+# Visual Studio 2019
+Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "dct8x8", "dct8x8_vs2019.vcxproj", "{997E0757-EA74-4A4E-A0FC-47D8C8831A15}"
+EndProject
+Global
+	GlobalSection(SolutionConfigurationPlatforms) = preSolution
+		Debug|x64 = Debug|x64
+		Release|x64 = Release|x64
+	EndGlobalSection
+	GlobalSection(ProjectConfigurationPlatforms) = postSolution
+		{997E0757-EA74-4A4E-A0FC-47D8C8831A15}.Debug|x64.ActiveCfg = Debug|x64
+		{997E0757-EA74-4A4E-A0FC-47D8C8831A15}.Debug|x64.Build.0 = Debug|x64
+		{997E0757-EA74-4A4E-A0FC-47D8C8831A15}.Release|x64.ActiveCfg = Release|x64
+		{997E0757-EA74-4A4E-A0FC-47D8C8831A15}.Release|x64.Build.0 = Release|x64
+	EndGlobalSection
+	GlobalSection(SolutionProperties) = preSolution
+		HideSolutionNode = FALSE
+	EndGlobalSection
+EndGlobal

Samples/2_Concepts_and_Techniques/dct8x8/dct8x8_vs2019.vcxproj

@@ -0,0 +1,116 @@
+<?xml version="1.0" encoding="utf-8"?>
+<Project DefaultTargets="Build" ToolsVersion="4.0" xmlns="http://schemas.microsoft.com/developer/msbuild/2003">
+  <PropertyGroup>
+    <CUDAPropsPath Condition="'$(CUDAPropsPath)'==''">$(VCTargetsPath)\BuildCustomizations</CUDAPropsPath>
+  </PropertyGroup>
+  <ItemGroup Label="ProjectConfigurations">
+    <ProjectConfiguration Include="Debug|x64">
+      <Configuration>Debug</Configuration>
+      <Platform>x64</Platform>
+    </ProjectConfiguration>
+    <ProjectConfiguration Include="Release|x64">
+      <Configuration>Release</Configuration>
+      <Platform>x64</Platform>
+    </ProjectConfiguration>
+  </ItemGroup>
+  <PropertyGroup Label="Globals">
+    <ProjectGuid>{997E0757-EA74-4A4E-A0FC-47D8C8831A15}</ProjectGuid>
+    <RootNamespace>dct8x8_vs2019</RootNamespace>
+    <ProjectName>dct8x8</ProjectName>
+    <CudaToolkitCustomDir />
+  </PropertyGroup>
+  <Import Project="$(VCTargetsPath)\Microsoft.Cpp.Default.props" />
+  <PropertyGroup>
+    <ConfigurationType>Application</ConfigurationType>
+    <CharacterSet>MultiByte</CharacterSet>
+    <PlatformToolset>v142</PlatformToolset>
+    <WindowsTargetPlatformVersion>10.0</WindowsTargetPlatformVersion>
+  </PropertyGroup>
+  <PropertyGroup Condition="'$(Configuration)'=='Debug'">
+    <UseDebugLibraries>true</UseDebugLibraries>
+  </PropertyGroup>
+  <PropertyGroup Condition="'$(Configuration)'=='Release'">
+    <WholeProgramOptimization>true</WholeProgramOptimization>
+  </PropertyGroup>
+  <Import Project="$(VCTargetsPath)\Microsoft.Cpp.props" />
+  <ImportGroup Label="ExtensionSettings">
+    <Import Project="$(CUDAPropsPath)\CUDA 11.6.props" />
+  </ImportGroup>
+  <ImportGroup Label="PropertySheets">
+    <Import Condition="exists('$(UserRootDir)\Microsoft.Cpp.$(Platform).user.props')" Label="LocalAppDataPlatform" Project="$(UserRootDir)\Microsoft.Cpp.$(Platform).user.props" />
+  </ImportGroup>
+  <PropertyGroup Label="UserMacros" />
+  <PropertyGroup>
+    <IntDir>$(Platform)/$(Configuration)/</IntDir>
+    <IncludePath>$(IncludePath)</IncludePath>
+    <CodeAnalysisRuleSet>AllRules.ruleset</CodeAnalysisRuleSet>
+    <CodeAnalysisRules />
+    <CodeAnalysisRuleAssemblies />
+  </PropertyGroup>
+  <PropertyGroup Condition="'$(Platform)'=='x64'">
+    <OutDir>../../../bin/win64/$(Configuration)/</OutDir>
+  </PropertyGroup>
+  <ItemDefinitionGroup>
+    <ClCompile>
+      <WarningLevel>Level3</WarningLevel>
+      <PreprocessorDefinitions>WIN32;_MBCS;%(PreprocessorDefinitions)</PreprocessorDefinitions>
+      <AdditionalIncludeDirectories>./;$(CudaToolkitDir)/include;../../../Common;</AdditionalIncludeDirectories>
+    </ClCompile>
+    <Link>
+      <SubSystem>Console</SubSystem>
+      <AdditionalDependencies>cudart_static.lib;kernel32.lib;user32.lib;gdi32.lib;winspool.lib;comdlg32.lib;advapi32.lib;shell32.lib;ole32.lib;oleaut32.lib;uuid.lib;odbc32.lib;odbccp32.lib;%(AdditionalDependencies)</AdditionalDependencies>
+      <AdditionalLibraryDirectories>$(CudaToolkitLibDir);</AdditionalLibraryDirectories>
+      <OutputFile>$(OutDir)/dct8x8.exe</OutputFile>
+    </Link>
+    <CudaCompile>
+      <CodeGeneration>compute_35,sm_35;compute_37,sm_37;compute_50,sm_50;compute_52,sm_52;compute_60,sm_60;compute_61,sm_61;compute_70,sm_70;compute_75,sm_75;compute_80,sm_80;compute_86,sm_86;</CodeGeneration>
+      <AdditionalOptions>-Xcompiler "/wd 4819"  --threads 0 </AdditionalOptions>
+      <Include>./;../../../Common</Include>
+      <Defines>WIN32</Defines>
+    </CudaCompile>
+  </ItemDefinitionGroup>
+  <ItemDefinitionGroup Condition="'$(Configuration)'=='Debug'">
+    <ClCompile>
+      <Optimization>Disabled</Optimization>
+      <RuntimeLibrary>MultiThreadedDebug</RuntimeLibrary>
+    </ClCompile>
+    <Link>
+      <GenerateDebugInformation>true</GenerateDebugInformation>
+      <LinkTimeCodeGeneration>Default</LinkTimeCodeGeneration>
+    </Link>
+    <CudaCompile>
+      <Runtime>MTd</Runtime>
+      <TargetMachinePlatform>64</TargetMachinePlatform>
+    </CudaCompile>
+  </ItemDefinitionGroup>
+  <ItemDefinitionGroup Condition="'$(Configuration)'=='Release'">
+    <ClCompile>
+      <Optimization>MaxSpeed</Optimization>
+      <RuntimeLibrary>MultiThreaded</RuntimeLibrary>
+    </ClCompile>
+    <Link>
+      <GenerateDebugInformation>false</GenerateDebugInformation>
+      <LinkTimeCodeGeneration>UseLinkTimeCodeGeneration</LinkTimeCodeGeneration>
+    </Link>
+    <CudaCompile>
+      <Runtime>MT</Runtime>
+      <TargetMachinePlatform>64</TargetMachinePlatform>
+    </CudaCompile>
+  </ItemDefinitionGroup>
+  <ItemGroup>
+    <ClCompile Include="BmpUtil.cpp" />
+    <ClCompile Include="DCT8x8_Gold.cpp" />
+    <CudaCompile Include="dct8x8.cu" />
+    <ClInclude Include="BmpUtil.h" />
+    <ClInclude Include="Common.h" />
+    <ClInclude Include="DCT8x8_Gold.h" />
+    <None Include="dct8x8_kernel1.cuh" />
+    <None Include="dct8x8_kernel2.cuh" />
+    <None Include="dct8x8_kernel_quantization.cuh" />
+    <None Include="dct8x8_kernel_short.cuh" />
+  </ItemGroup>
+  <Import Project="$(VCTargetsPath)\Microsoft.Cpp.targets" />
+  <ImportGroup Label="ExtensionTargets">
+    <Import Project="$(CUDAPropsPath)\CUDA 11.6.targets" />
+  </ImportGroup>
+</Project>

Samples/2_Concepts_and_Techniques/dct8x8/dct8x8_vs2022.sln

@@ -0,0 +1,20 @@
+
+Microsoft Visual Studio Solution File, Format Version 12.00
+# Visual Studio 2022
+Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "dct8x8", "dct8x8_vs2022.vcxproj", "{997E0757-EA74-4A4E-A0FC-47D8C8831A15}"
+EndProject
+Global
+	GlobalSection(SolutionConfigurationPlatforms) = preSolution
+		Debug|x64 = Debug|x64
+		Release|x64 = Release|x64
+	EndGlobalSection
+	GlobalSection(ProjectConfigurationPlatforms) = postSolution
+		{997E0757-EA74-4A4E-A0FC-47D8C8831A15}.Debug|x64.ActiveCfg = Debug|x64
+		{997E0757-EA74-4A4E-A0FC-47D8C8831A15}.Debug|x64.Build.0 = Debug|x64
+		{997E0757-EA74-4A4E-A0FC-47D8C8831A15}.Release|x64.ActiveCfg = Release|x64
+		{997E0757-EA74-4A4E-A0FC-47D8C8831A15}.Release|x64.Build.0 = Release|x64
+	EndGlobalSection
+	GlobalSection(SolutionProperties) = preSolution
+		HideSolutionNode = FALSE
+	EndGlobalSection
+EndGlobal

Samples/2_Concepts_and_Techniques/dct8x8/dct8x8_vs2022.vcxproj

@@ -0,0 +1,116 @@
+<?xml version="1.0" encoding="utf-8"?>
+<Project DefaultTargets="Build" ToolsVersion="4.0" xmlns="http://schemas.microsoft.com/developer/msbuild/2003">
+  <PropertyGroup>
+    <CUDAPropsPath Condition="'$(CUDAPropsPath)'==''">$(VCTargetsPath)\BuildCustomizations</CUDAPropsPath>
+  </PropertyGroup>
+  <ItemGroup Label="ProjectConfigurations">
+    <ProjectConfiguration Include="Debug|x64">
+      <Configuration>Debug</Configuration>
+      <Platform>x64</Platform>
+    </ProjectConfiguration>
+    <ProjectConfiguration Include="Release|x64">
+      <Configuration>Release</Configuration>
+      <Platform>x64</Platform>
+    </ProjectConfiguration>
+  </ItemGroup>
+  <PropertyGroup Label="Globals">
+    <ProjectGuid>{997E0757-EA74-4A4E-A0FC-47D8C8831A15}</ProjectGuid>
+    <RootNamespace>dct8x8_vs2022</RootNamespace>
+    <ProjectName>dct8x8</ProjectName>
+    <CudaToolkitCustomDir />
+  </PropertyGroup>
+  <Import Project="$(VCTargetsPath)\Microsoft.Cpp.Default.props" />
+  <PropertyGroup>
+    <ConfigurationType>Application</ConfigurationType>
+    <CharacterSet>MultiByte</CharacterSet>
+    <PlatformToolset>v143</PlatformToolset>
+    <WindowsTargetPlatformVersion>10.0</WindowsTargetPlatformVersion>
+  </PropertyGroup>
+  <PropertyGroup Condition="'$(Configuration)'=='Debug'">
+    <UseDebugLibraries>true</UseDebugLibraries>
+  </PropertyGroup>
+  <PropertyGroup Condition="'$(Configuration)'=='Release'">
+    <WholeProgramOptimization>true</WholeProgramOptimization>
+  </PropertyGroup>
+  <Import Project="$(VCTargetsPath)\Microsoft.Cpp.props" />
+  <ImportGroup Label="ExtensionSettings">
+    <Import Project="$(CUDAPropsPath)\CUDA 11.6.props" />
+  </ImportGroup>
+  <ImportGroup Label="PropertySheets">
+    <Import Condition="exists('$(UserRootDir)\Microsoft.Cpp.$(Platform).user.props')" Label="LocalAppDataPlatform" Project="$(UserRootDir)\Microsoft.Cpp.$(Platform).user.props" />
+  </ImportGroup>
+  <PropertyGroup Label="UserMacros" />
+  <PropertyGroup>
+    <IntDir>$(Platform)/$(Configuration)/</IntDir>
+    <IncludePath>$(IncludePath)</IncludePath>
+    <CodeAnalysisRuleSet>AllRules.ruleset</CodeAnalysisRuleSet>
+    <CodeAnalysisRules />
+    <CodeAnalysisRuleAssemblies />
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